From ea8e0c634bc9af5dad950f3b30d01330a096268e Mon Sep 17 00:00:00 2001 From: Devin Lu Date: Tue, 13 Apr 2021 10:15:25 +0800 Subject: careena: Add thermal protection This patch adds thermal protection to prevent AP runaway. BUG=b:185082703 BRANCH=firmware-grunt-11031.B TEST=Verify thermal halt/alert as expected. Signed-off-by: Devin Lu Change-Id: I4fccc93b0cb89a2e5d2784dfc0a41aa866f691f2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2822269 Reviewed-by: Edward Hill Commit-Queue: Edward Hill (cherry picked from commit 0d11b2f71e40e0147cc1dfc0a53b76758d318c77) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2834496 --- board/careena/board.c | 17 +++++++++++++++++ board/careena/board.h | 5 +++++ board/careena/gpio.inc | 2 +- 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/board/careena/board.c b/board/careena/board.c index 4e601ba532..c8236ea12b 100644 --- a/board/careena/board.c +++ b/board/careena/board.c @@ -15,6 +15,7 @@ #include "pwm.h" #include "pwm_chip.h" #include "switch.h" +#include "thermal.h" #include "gpio_list.h" @@ -46,6 +47,22 @@ const struct pwm_t pwm_channels[] = { }; BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); +struct ec_thermal_config thermal_params[TEMP_SENSOR_COUNT] = { + [TEMP_SENSOR_SOC] = { + .temp_host = { + [EC_TEMP_THRESH_WARN] = 0, + [EC_TEMP_THRESH_HIGH] = C_TO_K(74), + [EC_TEMP_THRESH_HALT] = C_TO_K(79), + }, + .temp_host_release = { + [EC_TEMP_THRESH_WARN] = 0, + [EC_TEMP_THRESH_HIGH] = C_TO_K(71), + [EC_TEMP_THRESH_HALT] = 0, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + #ifdef CONFIG_KEYBOARD_FACTORY_TEST /* * We have total 24 pins for keyboard connecter, {-1, -1} mean diff --git a/board/careena/board.h b/board/careena/board.h index a0fe7ca6ce..f6a47072fe 100644 --- a/board/careena/board.h +++ b/board/careena/board.h @@ -26,6 +26,11 @@ #define CONFIG_CMD_LEDTEST #define CONFIG_KEYBOARD_FACTORY_TEST +/* Thermal */ +#define CONFIG_CHIPSET_CAN_THROTTLE +#define CONFIG_CPU_PROCHOT_ACTIVE_LOW +#define CONFIG_THROTTLE_AP + #define CONFIG_BATTERY_MEASURE_IMBALANCE #define CONFIG_BATTERY_BQ4050 diff --git a/board/careena/gpio.inc b/board/careena/gpio.inc index eeccf9f50d..c84c81a68e 100644 --- a/board/careena/gpio.inc +++ b/board/careena/gpio.inc @@ -38,7 +38,7 @@ GPIO(CCD_MODE_ODL, PIN(E, 3), GPIO_INPUT) /* Case Closed Debug Mode */ GPIO(ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* EC Entering RW */ GPIO(EC_BATT_PRES_L, PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP) /* Battery Present */ GPIO(PCH_SYS_PWROK, PIN(D, 6), GPIO_OUT_LOW) /* Power OK to SOC */ -GPIO(CPU_PROCHOT, PIN(3, 4), GPIO_INPUT | GPIO_SEL_1P8V) /* PROCHOT to SOC */ +GPIO(CPU_PROCHOT, PIN(3, 4), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* PROCHOT to SOC */ GPIO(APU_ALERT_L, PIN(A, 2), GPIO_INPUT) /* Alert to SOC */ GPIO(3AXIS_INT_L, PIN(5, 0), GPIO_INPUT | GPIO_SEL_1P8V) /* 3 Axis Accel */ GPIO(TCPC_ID, PIN(E, 0), GPIO_INPUT | GPIO_PULL_DOWN) /* TCPC ID pin */ -- cgit v1.2.1