From ea19ea08d74de7911e498456698c5d7bb39db443 Mon Sep 17 00:00:00 2001 From: Scott Collyer Date: Tue, 27 Aug 2019 16:11:59 -0700 Subject: hatch: Change interrupt handler for EC_RSMRST_L This CL changes the interrupt handler for EC_RSMRST_L gpio to use intel_x86_rsmrst_signal_interrupt. This interrupt handler reduces the propagation delay for high->low signal transitions. BUG=b:132421681 BRANCH=None TEST=make buildall Change-Id: I00420347fad84b876688e8d8a7ede9093e11ccaf Signed-off-by: Scott Collyer Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1772482 Tested-by: Scott Collyer Reviewed-by: Tim Wawrzynczak Reviewed-by: Furquan Shaikh Commit-Queue: Scott Collyer --- board/akemi/gpio.inc | 2 +- board/hatch/gpio.inc | 2 +- board/helios/gpio.inc | 2 +- board/kindred/gpio.inc | 2 +- board/kohaku/gpio.inc | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/board/akemi/gpio.inc b/board/akemi/gpio.inc index 257e4c7444..ae156d3ffd 100644 --- a/board/akemi/gpio.inc +++ b/board/akemi/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt) GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/hatch/gpio.inc b/board/hatch/gpio.inc index 72d0b1f73d..7789d2c3db 100644 --- a/board/hatch/gpio.inc +++ b/board/hatch/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt) GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/helios/gpio.inc b/board/helios/gpio.inc index 108d45205a..746e2b5e4e 100644 --- a/board/helios/gpio.inc +++ b/board/helios/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt) GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/kindred/gpio.inc b/board/kindred/gpio.inc index 47e176c2bc..8ee26eeee3 100644 --- a/board/kindred/gpio.inc +++ b/board/kindred/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt) GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) diff --git a/board/kohaku/gpio.inc b/board/kohaku/gpio.inc index e105f5230a..e9294ddabc 100644 --- a/board/kohaku/gpio.inc +++ b/board/kohaku/gpio.inc @@ -20,7 +20,7 @@ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) +GPIO_INT(PG_EC_RSMRST_L, PIN(E, 2), GPIO_INT_BOTH, intel_x86_rsmrst_signal_interrupt) GPIO_INT(PG_EC_ALL_SYS_PWRGD, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(PP5000_A_PG_OD, PIN(D, 7), GPIO_INT_BOTH, power_signal_interrupt) -- cgit v1.2.1