From c4296cbbea6bcb2c439927b03706375b9b79ec51 Mon Sep 17 00:00:00 2001 From: CHLin Date: Fri, 10 Jan 2020 09:20:17 +0800 Subject: npcx: Do not reload the OFMCLK when system-jump When the OFMCLK is reloaded, it will be stopped until the clock generation becomes stable. During this narrow window, any eSPI response from EC will be abnormal. However, we needn't change the OFMCLK during system-jump because it should be set only once when EC powers on. BUG=b:145369656 BRANCH=none TEST=Pass "make buildall" TEST=The symptom no longer occurs for 3 hours stress test. Change-Id: Idcc745f11119ba3781787b8b5e77ea620264e908 Signed-off-by: CHLin Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1994685 Tested-by: CH Lin Reviewed-by: Tim Wawrzynczak Commit-Queue: CH Lin (cherry picked from commit 431a7a51479d7af21b39b7acab5d5bf831fbbf6d) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2002951 Commit-Queue: Tim Wawrzynczak Tested-by: Tim Wawrzynczak --- chip/npcx/clock.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/chip/npcx/clock.c b/chip/npcx/clock.c index 6bb5d4962e..287583232a 100644 --- a/chip/npcx/clock.c +++ b/chip/npcx/clock.c @@ -96,19 +96,26 @@ void clock_init(void) #endif /* - * Configure frequency multiplier M/N values according to - * the requested OSC_CLK (Unit:Hz). + * Resting the OSC_CLK (even to the same value) will make the clock + * unstable for a little which can affect peripheral communication like + * eSPI. Skip this if not needed (e.g. RW jump) */ - NPCX_HFCGN = HFCGN; - NPCX_HFCGML = HFCGML; - NPCX_HFCGMH = HFCGMH; - - /* Load M and N values into the frequency multiplier */ - SET_BIT(NPCX_HFCGCTRL, NPCX_HFCGCTRL_LOAD); - - /* Wait for stable */ - while (IS_BIT_SET(NPCX_HFCGCTRL, NPCX_HFCGCTRL_CLK_CHNG)) - ; + if (NPCX_HFCGN != HFCGN || NPCX_HFCGML != HFCGML + || NPCX_HFCGMH != HFCGMH) { + /* + * Configure frequency multiplier M/N values according to + * the requested OSC_CLK (Unit:Hz). + */ + NPCX_HFCGN = HFCGN; + NPCX_HFCGML = HFCGML; + NPCX_HFCGMH = HFCGMH; + + /* Load M and N values into the frequency multiplier */ + SET_BIT(NPCX_HFCGCTRL, NPCX_HFCGCTRL_LOAD); + /* Wait for stable */ + while (IS_BIT_SET(NPCX_HFCGCTRL, NPCX_HFCGCTRL_CLK_CHNG)) + ; + } /* Set all clock prescalers of core and peripherals. */ #if defined(CHIP_FAMILY_NPCX5) -- cgit v1.2.1