From 56af450c1a715ad38dda608da92b2326783e635b Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Tue, 9 May 2023 11:12:18 -0700 Subject: Agah: Fast forward DSW_PWROK to PCH_PWROK On urgent shutdown, it's required for PCH_PWROK to drop while PCH's voltages are still above 95%. This CL adds a dedicated interrupt handler for DSW_PWROK to reduce the latency. BUG=b:279918234 TEST=On Agah. The latency improved from 1.5 ms to 127 us. Change-Id: I004d11789bc94eb91f1f0df440bc5532bcb67a4b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4518229 Auto-Submit: Daisuke Nojiri Commit-Queue: Daisuke Nojiri Tested-by: Daisuke Nojiri Reviewed-by: Tarun Tuli --- board/agah/board.h | 1 + board/agah/gpio.inc | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/board/agah/board.h b/board/agah/board.h index 35ecdc58e6..ba2889130d 100644 --- a/board/agah/board.h +++ b/board/agah/board.h @@ -96,6 +96,7 @@ #define GPIO_PCH_WAKE_L GPIO_EC_PCH_INT_ODL #define GPIO_PG_EC_ALL_SYS_PWRGD GPIO_SEQ_EC_ALL_SYS_PG #define GPIO_PG_EC_DSW_PWROK GPIO_SEQ_EC_DSW_PWROK +#define GPIO_PCH_DSW_PWROK GPIO_PCH_PWROK #define GPIO_PG_EC_RSMRST_ODL GPIO_SEQ_EC_RSMRST_ODL #define GPIO_POWER_BUTTON_L GPIO_GSC_EC_PWR_BTN_ODL #define GPIO_SYS_RESET_L GPIO_SYS_RST_ODL diff --git a/board/agah/gpio.inc b/board/agah/gpio.inc index c9308fd903..7f120d9ba6 100644 --- a/board/agah/gpio.inc +++ b/board/agah/gpio.inc @@ -8,13 +8,13 @@ #define MODULE_KB MODULE_KEYBOARD_SCAN /* INTERRUPT GPIOs: */ +GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, intel_x86_pwrok_signal_interrupt) GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt) GPIO_INT(EC_PROCHOT_IN_L, PIN(F, 0), GPIO_INT_BOTH, throttle_ap_prochot_input_interrupt) GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) GPIO_INT(GSC_EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH | GPIO_HIB_WAKE_LOW, power_button_interrupt) GPIO_INT(LID_OPEN, PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt) GPIO_INT(SEQ_EC_ALL_SYS_PG, PIN(F, 4), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(SEQ_EC_DSW_PWROK, PIN(C, 7), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) -- cgit v1.2.1