From 40787b695522e837a8c63a90e02e654dcb6adbd8 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Tue, 17 Jul 2018 09:29:52 -0700 Subject: bobba: Change USB2_OTG_ID to open drain USB2_OTG_ID is 3.3V pin on the EC whereas the SoC expects USB2_DUALROLE and USB2_VBUS_SNS to be 1.8V. Since there is an internal pull-up on USB2_DUALROLE from the SoC side, this change configures USB2_OTG_ID to be open drain so that it is actively driven from the EC when it wants to pull it low. Otherwise, the pin would be tri-stated from the EC side allowing it to be pulled up to 1.8V because of the SoC internal pull-up. BUG=None BRANCH=None TEST=None Change-Id: Ia7f5cd32a80a2c9d0cc520bbacad0844aaec961d Signed-off-by: Furquan Shaikh Reviewed-on: https://chromium-review.googlesource.com/1140500 Commit-Ready: Furquan Shaikh Tested-by: Furquan Shaikh Reviewed-by: Jett Rink --- board/bobba/gpio.inc | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/board/bobba/gpio.inc b/board/bobba/gpio.inc index 98241aa864..0a7229036c 100644 --- a/board/bobba/gpio.inc +++ b/board/bobba/gpio.inc @@ -108,7 +108,12 @@ GPIO(USB_C1_BC12_VBUS_ON, PIN(B, 1), GPIO_OUT_LOW) /* C1 BC1.2 Power */ GPIO(USB_C1_BC12_CHG_DET_L, PIN(E, 4), GPIO_INPUT) /* C1 BC1.2 Detect */ GPIO(USB_C1_HPD_1V8_ODL, PIN(C, 6), GPIO_INPUT | /* C1 DP Hotplug Detect */ GPIO_SEL_1P8V) -GPIO(USB2_OTG_ID, PIN(8, 3), GPIO_OUT_LOW) /* OTG ID */ +/* + * USB2_OTG_ID is 1.8V pin on the SoC side with an internal pull-up. However, it + * 3.3V on the EC side. So, configure it as ODR so that the EC never drives it + * high. + */ +GPIO(USB2_OTG_ID, PIN(8, 3), GPIO_ODR_LOW) /* OTG ID */ /* LED */ GPIO(BAT_LED_ORANGE_L, PIN(C, 3), GPIO_OUT_HIGH) /* LED_1_L */ -- cgit v1.2.1