From 2b80d1c6d28573030c115f8219801fdd4e9cd2d2 Mon Sep 17 00:00:00 2001 From: Tomasz Michalec Date: Thu, 21 Apr 2022 17:15:52 +0200 Subject: zephyr: Extend JHL8040R DTS node to support USB-C mux configuration JHL8040R is BB retimer. Add necessary changes to make it possible to configure BB retimer as USB-C mux using a devicetree. Add code to generate bb_controls array with entry for every BB retimer in USB-C muxes chain. Align adlrvp and brya DTS to new banding of JHL8040R. BUG=b:229411952 TEST=zmake testall BRANCH=none Signed-off-by: Tomasz Michalec Change-Id: I339f09d5f259dea88c9a783290744162a94d9559 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3607989 Reviewed-by: Keith Short Commit-Queue: Tomasz Michalec Tested-by: Tomasz Michalec Reviewed-by: Jack Rosenthal --- zephyr/dts/bindings/retimer/intel,jhl8040r.yaml | 22 -------- zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml | 32 ++++++++++++ zephyr/projects/brya/BUILD.py | 1 - zephyr/projects/brya/bb_retimer.dts | 26 ---------- zephyr/projects/brya/i2c.dts | 2 +- zephyr/projects/brya/usbc.dts | 18 +++++++ zephyr/projects/intelrvp/BUILD.py | 1 - .../intelrvp/adlrvp/adlrvp_npcx/bb_retimer.dts | 60 ---------------------- .../projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts | 32 ++++++++++++ zephyr/shim/include/config_chip.h | 8 +-- zephyr/shim/include/usbc/bb_retimer_usb_mux.h | 32 ++++++++++++ zephyr/shim/include/usbc/usb_muxes.h | 32 +++++++++++- zephyr/shim/src/usb_muxes.c | 24 +++++++++ 13 files changed, 173 insertions(+), 117 deletions(-) delete mode 100644 zephyr/dts/bindings/retimer/intel,jhl8040r.yaml create mode 100644 zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml delete mode 100644 zephyr/projects/brya/bb_retimer.dts delete mode 100644 zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/bb_retimer.dts create mode 100644 zephyr/shim/include/usbc/bb_retimer_usb_mux.h diff --git a/zephyr/dts/bindings/retimer/intel,jhl8040r.yaml b/zephyr/dts/bindings/retimer/intel,jhl8040r.yaml deleted file mode 100644 index 2b88b18870..0000000000 --- a/zephyr/dts/bindings/retimer/intel,jhl8040r.yaml +++ /dev/null @@ -1,22 +0,0 @@ -# Copyright 2021 The Chromium OS Authors. All rights reserved. -# Use of this source code is governed by a BSD-style license that can be -# found in the LICENSE file. - -description: Intel JHL8040R Thunderbolt 4 Retimer - -compatible: "intel,jhl8040r" - -include: i2c-device.yaml - -properties: - reset-pin: - type: phandle - required: true - - int-pin: - type: phandle - required: false - - ls-en-pin: - type: phandle - required: false diff --git a/zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml b/zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml new file mode 100644 index 0000000000..5098080c25 --- /dev/null +++ b/zephyr/dts/bindings/usbc/mux/intel,jhl804r.yaml @@ -0,0 +1,32 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: Intel JHL8040R Thunderbolt 4 Retimer + +compatible: "intel,jhl8040r" + +include: cros-ec,usbc-mux.yaml + +properties: + reset-pin: + type: phandle + required: true + + int-pin: + type: phandle + required: false + + ls-en-pin: + type: phandle + required: false + + port: + type: phandle + required: true + description: phandle to the named i2c port + + i2c-addr-flags: + type: int + required: true + description: I2C address of chip diff --git a/zephyr/projects/brya/BUILD.py b/zephyr/projects/brya/BUILD.py index 0421d6dd7a..d044a11ae7 100644 --- a/zephyr/projects/brya/BUILD.py +++ b/zephyr/projects/brya/BUILD.py @@ -13,7 +13,6 @@ def register_npcx9_variant(project_name, extra_dts_overlays=(), extra_kconfig_fi dts_overlays=[ "adc.dts", "battery.dts", - "bb_retimer.dts", "cbi_eeprom.dts", "fan.dts", "gpio.dts", diff --git a/zephyr/projects/brya/bb_retimer.dts b/zephyr/projects/brya/bb_retimer.dts deleted file mode 100644 index bb12bf9afa..0000000000 --- a/zephyr/projects/brya/bb_retimer.dts +++ /dev/null @@ -1,26 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c3_0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; - pinctrl-names = "default"; - - usb_c0_bb_retimer: jhl8040r@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - label = "USB_C0_BB_RETIMER"; - int-pin = <&usb_c0_rt_int_odl>; - reset-pin = <&usb_c0_rt_rst_odl>; - }; - usb_c2_bb_retimer: jhl8040r@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - label = "USB_C2_BB_RETIMER"; - int-pin = <&usb_c2_rt_int_odl>; - reset-pin = <&usb_c2_rt_rst_odl>; - }; -}; diff --git a/zephyr/projects/brya/i2c.dts b/zephyr/projects/brya/i2c.dts index 04c90c0dae..6567e27bf0 100644 --- a/zephyr/projects/brya/i2c.dts +++ b/zephyr/projects/brya/i2c.dts @@ -28,7 +28,7 @@ enum-name = "I2C_PORT_USB_C1_PPC"; dynamic-speed; }; - retimer0_2 { + retimer0_2: retimer0_2 { i2c-port = <&i2c3_0>; enum-name = "I2C_PORT_USB_C0_C2_MUX"; }; diff --git a/zephyr/projects/brya/usbc.dts b/zephyr/projects/brya/usbc.dts index 9be1440c19..04e2702306 100644 --- a/zephyr/projects/brya/usbc.dts +++ b/zephyr/projects/brya/usbc.dts @@ -35,6 +35,15 @@ port = <&i2c_charger>; }; }; + port0-muxes { + usb_c0_bb_retimer: jhl8040r-c0 { + compatible = "intel,jhl8040r"; + port = <&retimer0_2>; + i2c-addr-flags = <0x56>; + int-pin = <&usb_c0_rt_int_odl>; + reset-pin = <&usb_c0_rt_rst_odl>; + }; + }; port1@1 { compatible = "named-usbc-port"; @@ -76,5 +85,14 @@ tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>; }; }; + port2-muxes { + usb_c2_bb_retimer: jhl8040r-c2 { + compatible = "intel,jhl8040r"; + port = <&retimer0_2>; + i2c-addr-flags = <0x57>; + int-pin = <&usb_c2_rt_int_odl>; + reset-pin = <&usb_c2_rt_rst_odl>; + }; + }; }; }; diff --git a/zephyr/projects/intelrvp/BUILD.py b/zephyr/projects/intelrvp/BUILD.py index 97956b9e2d..7b8bf9cb42 100644 --- a/zephyr/projects/intelrvp/BUILD.py +++ b/zephyr/projects/intelrvp/BUILD.py @@ -43,7 +43,6 @@ register_intelrvp_project( chip="npcx9m7f", extra_dts_overlays=[ here / "adlrvp/adlrvp_npcx/adlrvp_npcx.dts", - here / "adlrvp/adlrvp_npcx/bb_retimer.dts", here / "adlrvp/adlrvp_npcx/cbi_eeprom.dts", here / "adlrvp/adlrvp_npcx/fan.dts", here / "adlrvp/adlrvp_npcx/gpio.dts", diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/bb_retimer.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/bb_retimer.dts deleted file mode 100644 index 5127bbc8ad..0000000000 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/bb_retimer.dts +++ /dev/null @@ -1,60 +0,0 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -&i2c0_0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c0_0_sda_scl_gpb4_b5>; - pinctrl-names = "default"; - - usb_c0_bb_retimer: jhl8040r@56 { - compatible = "intel,jhl8040r"; - reg = <0x56>; - label = "USB_C0_BB_RETIMER"; - reset-pin = <&usb_c0_bb_retimer_rst>; - }; -}; - -&i2c2_0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>; - pinctrl-names = "default"; - - usb_c1_bb_retimer: jhl8040r@57 { - compatible = "intel,jhl8040r"; - reg = <0x57>; - label = "USB_C1_BB_RETIMER"; - reset-pin = <&usb_c1_bb_retimer_rst>; - }; -}; - -&i2c1_0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>; - pinctrl-names = "default"; - - usb_c2_bb_retimer: jhl8040r@58 { - compatible = "intel,jhl8040r"; - reg = <0x58>; - label = "USB_C2_BB_RETIMER"; - reset-pin = <&usb_c2_bb_retimer_rst>; - }; -}; - -&i2c3_0 { - status = "okay"; - clock-frequency = ; - pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>; - pinctrl-names = "default"; - - usb_c3_bb_retimer: jhl8040r@59 { - compatible = "intel,jhl8040r"; - reg = <0x59>; - label = "USB_C3_BB_RETIMER"; - reset-pin = <&usb_c3_bb_retimer_rst>; - }; -}; diff --git a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts index ec6f2091ac..a4698430a2 100644 --- a/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts +++ b/zephyr/projects/intelrvp/adlrvp/adlrvp_npcx/usbc.dts @@ -22,6 +22,14 @@ port = <&i2c_charger>; }; }; + port0-muxes { + usb_c0_bb_retimer: jhl8040r-c0 { + compatible = "intel,jhl8040r"; + port = <&typec_0>; + i2c-addr-flags = <0x56>; + reset-pin = <&usb_c0_bb_retimer_rst>; + }; + }; port1@1 { compatible = "named-usbc-port"; @@ -33,6 +41,14 @@ i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; }; }; + port1-muxes { + usb_c1_bb_retimer: jhl8040r-c1 { + compatible = "intel,jhl8040r"; + port = <&typec_1>; + i2c-addr-flags = <0x57>; + reset-pin = <&usb_c1_bb_retimer_rst>; + }; + }; port2@2 { compatible = "named-usbc-port"; @@ -44,6 +60,14 @@ i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; }; }; + port2-muxes { + usb_c2_bb_retimer: jhl8040r-c2 { + compatible = "intel,jhl8040r"; + port = <&typec_2>; + i2c-addr-flags = <0x58>; + reset-pin = <&usb_c2_bb_retimer_rst>; + }; + }; port3@3 { compatible = "named-usbc-port"; @@ -55,5 +79,13 @@ i2c-addr-flags = "FUSB302_I2C_ADDR_FLAGS"; }; }; + port3-muxes { + usb_c3_bb_retimer: jhl8040r-c3 { + compatible = "intel,jhl8040r"; + port = <&typec_3>; + i2c-addr-flags = <0x59>; + reset-pin = <&usb_c3_bb_retimer_rst>; + }; + }; }; }; diff --git a/zephyr/shim/include/config_chip.h b/zephyr/shim/include/config_chip.h index 079d8ed3e2..509f1a3749 100644 --- a/zephyr/shim/include/config_chip.h +++ b/zephyr/shim/include/config_chip.h @@ -1589,13 +1589,13 @@ extern struct jump_data mock_jump_data; #ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB #define USBC_PORT_C0_BB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c0_bb_retimer)) + DT_PROP(DT_NODELABEL(usb_c0_bb_retimer), i2c_addr_flags) #define USBC_PORT_C1_BB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c1_bb_retimer)) + DT_PROP(DT_NODELABEL(usb_c1_bb_retimer), i2c_addr_flags) #define USBC_PORT_C2_BB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c2_bb_retimer)) + DT_PROP(DT_NODELABEL(usb_c2_bb_retimer), i2c_addr_flags) #define USBC_PORT_C3_BB_RETIMER_I2C_ADDR \ - DT_REG_ADDR(DT_NODELABEL(usb_c3_bb_retimer)) + DT_PROP(DT_NODELABEL(usb_c3_bb_retimer), i2c_addr_flags) #define CONFIG_USBC_RETIMER_INTEL_BB #endif diff --git a/zephyr/shim/include/usbc/bb_retimer_usb_mux.h b/zephyr/shim/include/usbc/bb_retimer_usb_mux.h new file mode 100644 index 0000000000..611c52e081 --- /dev/null +++ b/zephyr/shim/include/usbc/bb_retimer_usb_mux.h @@ -0,0 +1,32 @@ +/* Copyright 2022 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_SHIM_BB_RETIMER_USB_MUX_H +#define __ZEPHYR_SHIM_BB_RETIMER_USB_MUX_H + +#include "driver/retimer/bb_retimer_public.h" + +#define BB_RETIMER_USB_MUX_COMPAT intel_jhl8040r + +#define USB_MUX_CONFIG_BB_RETIMER(mux_id, port_id, idx) \ + { \ + USB_MUX_COMMON_FIELDS(mux_id, port_id, idx), \ + .driver = &bb_usb_retimer, \ + .hpd_update = bb_retimer_hpd_update, \ + .i2c_port = I2C_PORT(DT_PHANDLE(mux_id, port)), \ + .i2c_addr_flags = DT_PROP(mux_id, i2c_addr_flags), \ + } + +#define BB_RETIMER_CONTROLS_CONFIG(mux_id, port_id, idx) \ + { \ + .retimer_rst_gpio = \ + GPIO_SIGNAL(DT_PHANDLE(mux_id, reset_pin)), \ + .usb_ls_en_gpio = COND_CODE_1( \ + DT_NODE_HAS_PROP(mux_id, ls_en_pin), \ + (GPIO_SIGNAL(DT_PHANDLE(mux_id, ls_en_pin))), \ + (GPIO_UNIMPLEMENTED)), \ + } + +#endif /* __ZEPHYR_SHIM_BB_RETIMER_USB_MUX_H */ diff --git a/zephyr/shim/include/usbc/usb_muxes.h b/zephyr/shim/include/usbc/usb_muxes.h index e56e538a74..9422d4008d 100644 --- a/zephyr/shim/include/usbc/usb_muxes.h +++ b/zephyr/shim/include/usbc/usb_muxes.h @@ -10,6 +10,7 @@ #include #include "usb_mux.h" #include "usbc/anx7483_usb_mux.h" +#include "usbc/bb_retimer_usb_mux.h" #include "usbc/it5205_usb_mux.h" #include "usbc/tcpci_usb_mux.h" #include "usbc/tusb1064_usb_mux.h" @@ -21,6 +22,7 @@ */ #define USB_MUX_DRIVERS \ (ANX7483_USB_MUX_COMPAT, USB_MUX_CONFIG_ANX7483), \ + (BB_RETIMER_USB_MUX_COMPAT, USB_MUX_CONFIG_BB_RETIMER), \ (IT5205_USB_MUX_COMPAT, USB_MUX_CONFIG_IT5205), \ (PS8XXX_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ (TCPCI_TCPM_USB_MUX_COMPAT, USB_MUX_CONFIG_TCPCI_TCPM), \ @@ -196,8 +198,7 @@ * @param op Operation to perform on USB muxes */ #define USB_MUX_DO(port_id, idx, op) \ - USB_MUX_CALL_OP(DT_PHANDLE_BY_IDX(port_id, usb_muxes, idx), \ - port_id, idx, op) + USB_MUX_CALL_OP(USB_MUX_GET_CHAIN_N(idx, port_id), port_id, idx, op) /** * @brief Declare USB mux structure @@ -266,6 +267,33 @@ DT_FOREACH_PROP_ELEM_VARGS(port_id, usb_muxes, \ USB_MUX_DO_SKIP_FIRST, op) +/** + * @brief Call @p op if @p idx mux in chain has BB retimer compatible + * + * @param port_id USBC node ID + * @param unused2 This argument is expected by DT_FOREACH_PROP_ELEM_VARGS + * @param idx Position of USB mux in chain + * @param op Operation to perform on BB retimer + */ +#define USB_MUX_ONLY_BB_RETIMER(port_id, unused2, idx, op) \ + COND_CODE_1(USB_MUX_IS_COMPATIBLE( \ + USB_MUX_GET_CHAIN_N(idx, port_id), \ + BB_RETIMER_USB_MUX_COMPAT), \ + (op(USB_MUX_GET_CHAIN_N(idx, port_id), port_id, \ + idx, BB_RETIMER_CONTROLS_CONFIG)), ()) + +/** + * @brief Call @p op with every BB retimer in chain + * + * @param port_id USBC node ID + * @param op Operation to perform on BB retimers. Needs to accept USB mux node + * ID, USBC port node ID, position in chain, and driver config as + * arguments. + */ +#define USB_MUX_BB_RETIMERS(port_id, op) \ + DT_FOREACH_PROP_ELEM_VARGS(port_id, usb_muxes, \ + USB_MUX_ONLY_BB_RETIMER, op) + /** * @brief If @p port_id has usb_muxes property, call @p op with every mux in * chain that passes @p filter diff --git a/zephyr/shim/src/usb_muxes.c b/zephyr/shim/src/usb_muxes.c index 9244f3cf68..f96146258a 100644 --- a/zephyr/shim/src/usb_muxes.c +++ b/zephyr/shim/src/usb_muxes.c @@ -58,4 +58,28 @@ MAYBE_CONST struct usb_mux usb_muxes[] = { */ USB_MUX_FOREACH_USBC_PORT(USB_MUX_NO_FIRST, USB_MUX_DEFINE) +/* Create bb_controls only if BB retimer driver is enabled */ +#ifdef CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB +/** + * @brief bb_controls array should be constant only if configuration cannot + * change in runtime + */ +#define BB_CONTROLS_CONST \ + COND_CODE_1( \ + CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB_RUNTIME_CONFIG,\ + (), (const)) + +/** + * Define bb_controls for BB retimers in USB muxes chain e.g. + * [0] = { + * .retimer_rst_gpio = IOEX_USB_C0_BB_RETIMER_RST, + * .usb_ls_en_gpio = IOEX_USB_C0_BB_RETIMER_LS_EN, + * }, + * [1] = { ... }, + */ +BB_CONTROLS_CONST struct bb_usb_control bb_controls[] = { + USB_MUX_FOREACH_USBC_PORT(USB_MUX_BB_RETIMERS, USB_MUX_ARRAY) +}; +#endif /* CONFIG_PLATFORM_EC_USBC_RETIMER_INTEL_BB */ + #endif /* #if USB_MUX_FOREACH_USBC_PORT(USB_MUX_PORT_HAS_MUX, _) */ -- cgit v1.2.1