diff options
author | Eric Yilun Lin <yllin@chromium.org> | 2022-06-24 16:56:26 +0800 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-07-15 09:53:47 +0000 |
commit | 75ea31b7dda9f4fd1dc902f26957c59fe1553d74 (patch) | |
tree | f970e36c839818c1b2107b5cad9addd049331419 | |
parent | 354bd338fd59a76cf3cf6ff84cbcb3dec828f0c3 (diff) | |
download | chrome-ec-75ea31b7dda9f4fd1dc902f26957c59fe1553d74.tar.gz |
rt1718s: support device binding for TCPC and BC1.2
support RichTek RT1718S BC1.2 and TCPC device binding
BUG=b:227359727
TEST=zmake build -a
BRANCH=none
Change-Id: I3c13781e9bc53fa269295d900903d38ac91b1f0d
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3721945
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Tested-by: Eric Yilun Lin <yllin@google.com>
-rw-r--r-- | docs/zephyr/zephyr_bc12.md | 6 | ||||
-rw-r--r-- | zephyr/dts/bindings/usbc/richtek,rt1718s-bc12.yaml | 7 | ||||
-rw-r--r-- | zephyr/dts/bindings/usbc/richtek,rt1718s-tcpc.yaml | 30 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/bc12_rt1718s.h | 13 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/tcpc_rt1718s.h | 27 | ||||
-rw-r--r-- | zephyr/shim/src/bc12.c | 12 | ||||
-rw-r--r-- | zephyr/shim/src/tcpc.c | 4 |
7 files changed, 98 insertions, 1 deletions
diff --git a/docs/zephyr/zephyr_bc12.md b/docs/zephyr/zephyr_bc12.md index 6fffc16358..b74d369eb7 100644 --- a/docs/zephyr/zephyr_bc12.md +++ b/docs/zephyr/zephyr_bc12.md @@ -22,6 +22,12 @@ A BC1.2 device node should be child of an USBC port node with a compatible property equals to "named-usbc-port". The USBC port node should have only one BC1.2 device node. +### Richtek RT1718S + +There are two nodes describing the Richtek RT1718, one for BC1.2 +[richtek,rt1718-bc12.yaml] and one for TCPC[richtek,rt1718s-tcpc.yaml]. The node +for the TCPC contains information about I2C bus and address. + ### Richtek RT1739 There are two nodes describing the Richtek RT1739, one for BC1.2 diff --git a/zephyr/dts/bindings/usbc/richtek,rt1718s-bc12.yaml b/zephyr/dts/bindings/usbc/richtek,rt1718s-bc12.yaml new file mode 100644 index 0000000000..6898d9ccd5 --- /dev/null +++ b/zephyr/dts/bindings/usbc/richtek,rt1718s-bc12.yaml @@ -0,0 +1,7 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC RT1718S BC1.2 + +compatible: "richtek,rt1718s-bc12" diff --git a/zephyr/dts/bindings/usbc/richtek,rt1718s-tcpc.yaml b/zephyr/dts/bindings/usbc/richtek,rt1718s-tcpc.yaml new file mode 100644 index 0000000000..c82eed0e22 --- /dev/null +++ b/zephyr/dts/bindings/usbc/richtek,rt1718s-tcpc.yaml @@ -0,0 +1,30 @@ +# Copyright 2022 The ChromiumOS Authors. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +description: USBC RT1718S TCPC + +compatible: "richtek,rt1718s-tcpc" + +properties: + port: + type: phandle + required: true + description: | + I2C port used to communicate with controller + + i2c-addr-flags: + type: string + default: "RT1718S_I2C_ADDR1_FLAGS" + enum: + - "RT1718S_I2C_ADDR1_FLAGS" + - "RT1718S_I2C_ADDR2_FLAGS" + description: | + I2C address of controller + + tcpc-flags: + type: int + default: 0 + description: | + TCPC configuration flags + diff --git a/zephyr/shim/include/usbc/bc12_rt1718s.h b/zephyr/shim/include/usbc/bc12_rt1718s.h new file mode 100644 index 0000000000..578d0dab5a --- /dev/null +++ b/zephyr/shim/include/usbc/bc12_rt1718s.h @@ -0,0 +1,13 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "tcpm/rt1718s_public.h" + +#define RT1718S_BC12_COMPAT richtek_rt1718s_bc12 + +#define BC12_CHIP_RT1718S(id) \ + { \ + .drv = &rt1718s_bc12_drv, \ + } diff --git a/zephyr/shim/include/usbc/tcpc_rt1718s.h b/zephyr/shim/include/usbc/tcpc_rt1718s.h new file mode 100644 index 0000000000..acab65b6e5 --- /dev/null +++ b/zephyr/shim/include/usbc/tcpc_rt1718s.h @@ -0,0 +1,27 @@ +/* Copyright 2022 The ChromiumOS Authors. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <zephyr/devicetree.h> +#include "tcpm/rt1718s_public.h" + +#define RT1718S_TCPC_COMPAT richtek_rt1718s_tcpc + +/* + * Currently, the clang-format will force the back-slash at col:81. Enable + * format after we fix the issue. + */ +/* clang-format off */ +#define TCPC_CONFIG_RT1718S(id) \ + { \ + .bus_type = EC_BUS_TYPE_I2C, \ + .i2c_info = { \ + .port = I2C_PORT(DT_PHANDLE(id, port)), \ + .addr_flags = DT_STRING_UPPER_TOKEN( \ + id, i2c_addr_flags), \ + }, \ + .drv = &rt1718s_tcpm_drv, \ + .flags = DT_PROP(id, tcpc_flags), \ + } +/* clang-format on */ diff --git a/zephyr/shim/src/bc12.c b/zephyr/shim/src/bc12.c index 9ed57b6310..539e441949 100644 --- a/zephyr/shim/src/bc12.c +++ b/zephyr/shim/src/bc12.c @@ -5,21 +5,31 @@ #include <zephyr/devicetree.h> #include "usbc/bc12_pi3usb9201.h" +#include "usbc/bc12_rt1718s.h" #include "usbc/bc12_rt1739.h" #include "usbc/bc12_rt9490.h" +#include "usbc/tcpc_rt1718s.h" #include "usbc/utils.h" #include "usb_charge.h" -#if DT_HAS_COMPAT_STATUS_OKAY(RT1739_BC12_COMPAT) || \ +#if DT_HAS_COMPAT_STATUS_OKAY(RT1718S_BC12_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(RT1739_BC12_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(RT9490_BC12_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(PI3USB9201_COMPAT) +/* Check RT1718S dependency. BC12 node must be dependent on TCPC node. */ +#if DT_HAS_COMPAT_STATUS_OKAY(RT1718S_BC12_COMPAT) +BUILD_ASSERT(DT_HAS_COMPAT_STATUS_OKAY(RT1718S_TCPC_COMPAT)); +#endif + #define BC12_CHIP(id, fn) [USBC_PORT(id)] = fn(id) /* Power Path Controller */ /* Enable clang-format when the formatted code is readable. */ /* clang-format off */ struct bc12_config bc12_ports[CHARGE_PORT_COUNT] = { + DT_FOREACH_STATUS_OKAY_VARGS(RT1718S_BC12_COMPAT, BC12_CHIP, + BC12_CHIP_RT1718S) DT_FOREACH_STATUS_OKAY_VARGS(RT1739_BC12_COMPAT, BC12_CHIP, BC12_CHIP_RT1739) DT_FOREACH_STATUS_OKAY_VARGS(RT9490_BC12_COMPAT, BC12_CHIP, diff --git a/zephyr/shim/src/tcpc.c b/zephyr/shim/src/tcpc.c index 26b913c645..02cecdd70f 100644 --- a/zephyr/shim/src/tcpc.c +++ b/zephyr/shim/src/tcpc.c @@ -12,6 +12,7 @@ #include "usbc/tcpc_it8xxx2.h" #include "usbc/tcpc_nct38xx.h" #include "usbc/tcpc_ps8xxx.h" +#include "usbc/tcpc_rt1718s.h" #include "usbc/tcpci.h" #include "usbc/utils.h" @@ -20,6 +21,7 @@ DT_HAS_COMPAT_STATUS_OKAY(IT8XXX2_TCPC_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(PS8XXX_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(NCT38XX_TCPC_COMPAT) || \ + DT_HAS_COMPAT_STATUS_OKAY(RT1718S_TCPC_COMPAT) || \ DT_HAS_COMPAT_STATUS_OKAY(TCPCI_COMPAT) #define TCPC_CONFIG(id, fn) [USBC_PORT(id)] = fn(id) @@ -40,6 +42,8 @@ MAYBE_CONST struct tcpc_config_t tcpc_config[] = { TCPC_CONFIG_PS8XXX) DT_FOREACH_STATUS_OKAY_VARGS(NCT38XX_TCPC_COMPAT, TCPC_CONFIG, TCPC_CONFIG_NCT38XX) + DT_FOREACH_STATUS_OKAY_VARGS(RT1718S_TCPC_COMPAT, TCPC_CONFIG, + TCPC_CONFIG_RT1718S) DT_FOREACH_STATUS_OKAY_VARGS(TCPCI_COMPAT, TCPC_CONFIG, TCPC_CONFIG_TCPCI) }; |