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authorGwendal Grignou <gwendal@chromium.org>2020-03-06 15:14:34 -0800
committerCommit Bot <commit-bot@chromium.org>2020-03-10 23:07:47 +0000
commitec59ff0112ce7209477bfcaea0ef1ab82386733f (patch)
tree96f5150dbeb9483cdd5fa8f58b77664557fec95d
parentb3d4fa10fd47820fad5956d088d97abe8babdd97 (diff)
downloadchrome-ec-ec59ff0112ce7209477bfcaea0ef1ab82386733f.tar.gz
driver: bma2x2: Fix frequency precision error
On nautilus, the max frequency is set to 62.5Hz (the EC max frequency is set to 100Hz). However, when setting frequency to 62500 (mHz), the EC would bump up the frequency to 125Hz. The problem was in the calculation of the true frequency. By using 7.81Hz instead of 7.8125Hz as the multiplier, the driver would calculate the true frequency as 62480mHz, so it would set the accelerometer frequency to the next data rate. BUG=chromium:1059456 BRANCH=poppy TEST=On nocturne, check frequency is set right and tast run <IP> hardware.SensorRing passes. Change-Id: I743201bc8cccc7d38f39d1e370d660f4f37b4d95 Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2092911 Reviewed-by: Heng-ruey Hsu <henryhsu@chromium.org> (cherry picked from commit 6c25137279a382ed186aff0d21f471503dcca16b) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2097440
-rw-r--r--driver/accel_bma2x2.h18
1 files changed, 10 insertions, 8 deletions
diff --git a/driver/accel_bma2x2.h b/driver/accel_bma2x2.h
index 09a4ea2452..471194f969 100644
--- a/driver/accel_bma2x2.h
+++ b/driver/accel_bma2x2.h
@@ -73,22 +73,24 @@ extern const struct accelgyro_drv bma2x2_accel_drv;
#define BMA2x2_BW_SELECT_ADDR 0x10
#define BMA2x2_BW_MSK 0x1F
-#define BMA2x2_BW_7_81HZ 0x08 /* LowPass 7.81HZ */
-#define BMA2x2_BW_15_63HZ 0x09 /* LowPass 15.63HZ */
-#define BMA2x2_BW_31_25HZ 0x0A /* LowPass 31.25HZ */
-#define BMA2x2_BW_62_50HZ 0x0B /* LowPass 62.50HZ */
+#define BMA2x2_BW_7_81HZ 0x08 /* LowPass 7.8125HZ */
+#define BMA2x2_BW_15_63HZ 0x09 /* LowPass 15.625HZ */
+#define BMA2x2_BW_31_25HZ 0x0A /* LowPass 31.25HZ */
+#define BMA2x2_BW_62_50HZ 0x0B /* LowPass 62.50HZ */
#define BMA2x2_BW_125HZ 0x0C /* LowPass 125HZ */
#define BMA2x2_BW_250HZ 0x0D /* LowPass 250HZ */
#define BMA2x2_BW_500HZ 0x0E /* LowPass 500HZ */
#define BMA2x2_BW_1000HZ 0x0F /* LowPass 1000HZ */
#define BMA2x2_BW_TO_REG(_bw) \
- ((_bw) < 125000 ? BMA2x2_BW_7_81HZ + __fls((_bw) / 7810) : \
- BMA2x2_BW_125HZ + __fls((_bw) / 125000))
+ ((_bw) < 125000 ? \
+ BMA2x2_BW_7_81HZ + __fls(((_bw) * 10) / 78125) : \
+ BMA2x2_BW_125HZ + __fls((_bw) / 125000))
#define BMA2x2_REG_TO_BW(_reg) \
- ((_reg) < BMA2x2_BW_125HZ ? 7810 << ((_reg) - BMA2x2_BW_7_81HZ) : \
- 125000 << ((_reg) - BMA2x2_BW_125HZ))
+ ((_reg) < BMA2x2_BW_125HZ ? \
+ (78125 << ((_reg) - BMA2x2_BW_7_81HZ)) / 10 : \
+ 125000 << ((_reg) - BMA2x2_BW_125HZ))
#define BMA2x2_MODE_CTRL_ADDR 0x11
#define BMA2x2_LOW_NOISE_CTRL_ADDR 0x12