From 26c22a5e3368157fae6c4e905d3779b445e41cc5 Mon Sep 17 00:00:00 2001 From: Varun Wadekar Date: Thu, 23 Jul 2020 10:31:42 -0700 Subject: Tegra186: sanity check power state type This patch sanity checks the power state type before use, from the platform's PSCI handler. Verified with TFTF Standard Test Suite. Change-Id: Icd45faac6c023d4ce7f3597b698d01b91a218124 Signed-off-by: Varun Wadekar --- plat/nvidia/tegra/soc/t186/plat_psci_handlers.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c index 6f58427b3..af4182e24 100644 --- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c @@ -72,6 +72,11 @@ int32_t tegra_soc_validate_power_state(uint32_t power_state, case PSTATE_ID_CORE_IDLE: case PSTATE_ID_CORE_POWERDN: + if (psci_get_pstate_type(power_state) != PSTATE_TYPE_POWERDOWN) { + ret = PSCI_E_INVALID_PARAMS; + break; + } + /* Core powerdown request */ req_state->pwr_domain_state[MPIDR_AFFLVL0] = state_id; req_state->pwr_domain_state[MPIDR_AFFLVL1] = state_id; -- cgit v1.2.1