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| author | Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com> | 2023-04-24 13:56:12 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2023-05-12 09:54:51 +0100 |
| commit | cb6c8efc4f2dd951b2b51801a12ba1755d49fe79 (patch) | |
| tree | 535aa7e8aff0e2157623613b25e2a33e3f559b66 /common/uuid.c | |
| parent | dcf430656ca8ef964fa55ad9eb81cf838c7837f2 (diff) | |
| download | arm-trusted-firmware-cb6c8efc4f2dd951b2b51801a12ba1755d49fe79.tar.gz | |
fix(tegra210): mark bits [23:17] as zero for Fast SMCs
Per SMCCC documentation, bits [23:17] must be zero for Fast
SMCs. Other values are reserved for future use. Ensure that
these bits are zeroes for TEGRA_SIP_PMC_COMMANDS.
Commit f8a35797 introduced a check to return error if these
bits are not zero, thus breaking Tegra210 platforms. This
patch fixes the anomaly.
Change-Id: I19edc3b33c999a6fee6b86184233fba146316466
Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'common/uuid.c')
0 files changed, 0 insertions, 0 deletions