diff options
author | Chris Kay <chris.kay@arm.com> | 2023-02-14 11:30:04 +0000 |
---|---|---|
committer | Chris Kay <chris.kay@arm.com> | 2023-02-20 18:29:33 +0000 |
commit | da04341ed52d214139fe2d16667ef5b58c38e502 (patch) | |
tree | 3dd46c3cd597ab3c72c141e09017cf9ed5e2d220 /bl32 | |
parent | ac98b82a1f2e1ee323967a8a80e496e82ad9a832 (diff) | |
download | arm-trusted-firmware-da04341ed52d214139fe2d16667ef5b58c38e502.tar.gz |
build: always prefix section names with `.`
Some of our specialized sections are not prefixed with the conventional
period. The compiler uses input section names to derive certain other
section names (e.g. `.rela.text`, `.relacpu_ops`), and these can be
difficult to select in linker scripts when there is a lack of a
delimiter.
This change introduces the period prefix to all specialized section
names.
BREAKING-CHANGE: All input and output linker section names have been
prefixed with the period character, e.g. `cpu_ops` -> `.cpu_ops`.
Change-Id: I51c13c5266d5975fbd944ef4961328e72f82fc1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
Diffstat (limited to 'bl32')
-rw-r--r-- | bl32/sp_min/sp_min.ld.S | 10 | ||||
-rw-r--r-- | bl32/tsp/tsp.ld.S | 8 |
2 files changed, 9 insertions, 9 deletions
diff --git a/bl32/sp_min/sp_min.ld.S b/bl32/sp_min/sp_min.ld.S index 59e164afa..1695e1e0a 100644 --- a/bl32/sp_min/sp_min.ld.S +++ b/bl32/sp_min/sp_min.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -62,7 +62,7 @@ SECTIONS { __RODATA_END__ = .; } >RAM #else /* SEPARATE_CODE_AND_RODATA */ - ro . : { + .ro . : { __RO_START__ = .; *entrypoint.o(.text*) @@ -115,15 +115,15 @@ SECTIONS { * not mixed with normal data. This is required to set up the correct * memory attributes for the coherent data page tables. */ - coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { + .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { __COHERENT_RAM_START__ = .; /* * Bakery locks are stored in coherent memory. Each lock's data is * contiguous and fully allocated by the compiler. */ - *(bakery_lock) - *(tzfw_coherent_mem) + *(.bakery_lock) + *(.tzfw_coherent_mem) __COHERENT_RAM_END_UNALIGNED__ = .; diff --git a/bl32/tsp/tsp.ld.S b/bl32/tsp/tsp.ld.S index 1e9cb8881..a6658dd7c 100644 --- a/bl32/tsp/tsp.ld.S +++ b/bl32/tsp/tsp.ld.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -46,7 +46,7 @@ SECTIONS { __RODATA_END__ = .; } >RAM #else /* SEPARATE_CODE_AND_RODATA */ - ro . : { + .ro . : { __RO_START__ = .; *tsp_entrypoint.o(.text*) @@ -90,9 +90,9 @@ SECTIONS { * not mixed with normal data. This is required to set up the correct memory * attributes for the coherent data page tables. */ - coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { + .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { __COHERENT_RAM_START__ = .; - *(tzfw_coherent_mem) + *(.tzfw_coherent_mem) __COHERENT_RAM_END_UNALIGNED__ = .; /* |