delta/coreboot/arm-trusted-firmware.git, branch topics/clang-format review.coreboot.org: arm-trusted-firmware.git style(clang-format): synchronize code style with upstream 2023-03-09T18:46:41+00:00 Trusted Firmware CI ci@trustedfirmware.org 2023-03-09T18:46:41+00:00 78243aa9a7a8e07f9af67be4adbf90631de712a7 This change synchronizes the Clang-Format configuration file with its remote source: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/.clang-format EOF Signed-off-by: Trusted Firmware CI <ci@trustedfirmware.org> Change-Id: I9a0aca55001acb0bfd8c00c42f9de26189dd1b47 
This change synchronizes the Clang-Format configuration file with its remote source:

    https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/.clang-format
                        EOF

Signed-off-by: Trusted Firmware CI <ci@trustedfirmware.org>
Change-Id: I9a0aca55001acb0bfd8c00c42f9de26189dd1b47
style(clang-format): remove patch from itself 2023-03-09T16:02:19+00:00 Chris Kay chris.kay@arm.com 2023-03-09T16:02:19+00:00 b8717b0be22902772ef5217c6afc648d9ea63018 Change-Id: I8bc9bd2aebedf563ad1c048b17412a25a0d2fc23 Signed-off-by: Chris Kay <chris.kay@arm.com> 
Change-Id: I8bc9bd2aebedf563ad1c048b17412a25a0d2fc23
Signed-off-by: Chris Kay <chris.kay@arm.com>
style(clang-format): invert diff 2023-03-09T15:59:05+00:00 Chris Kay chris.kay@arm.com 2023-03-09T15:59:05+00:00 fff4d29dd4d7a2100c7fad24fc1c6c03c8e780ae The diff was generated in reverse - un-reverse it! Change-Id: Ib5d5dc07296f0546a46f4f09f75018a54491bcf7 Signed-off-by: Chris Kay <chris.kay@arm.com> 
The diff was generated in reverse - un-reverse it!

Change-Id: Ib5d5dc07296f0546a46f4f09f75018a54491bcf7
Signed-off-by: Chris Kay <chris.kay@arm.com>
style(clang-format): re-order `#include` directives 2023-03-09T15:28:33+00:00 Chris Kay chris.kay@arm.com 2023-03-07T20:38:30+00:00 593fb294bdbfdc83d44c42997b53ab4eaeef4bba Add support for automatically re-ordering `#include` preprocessor directives in our Clang-Format configuration. Change-Id: I4df42cfc6ed5ac91221fe141474d130d6b1c7677 Signed-off-by: Chris Kay <chris.kay@arm.com> 
Add support for automatically re-ordering `#include` preprocessor
directives in our Clang-Format configuration.

Change-Id: I4df42cfc6ed5ac91221fe141474d130d6b1c7677
Signed-off-by: Chris Kay <chris.kay@arm.com>
style(clang-format): add `.clang-format` patch 2023-03-07T20:44:56+00:00 Chris Kay chris.kay@arm.com 2023-03-07T20:38:30+00:00 5763c234a83ee89d88f7bda4b7a87f2a5ed91228 The `tf-a-sync-code-style` OpenCI job applies this patch to the `.clang-format` file used by the Linux kernel project to generate TF-A's own code style configuration. Change-Id: I4df42cfc6ed5ac91221fe141474d130d6b1c7677 Signed-off-by: Chris Kay <chris.kay@arm.com> 
The `tf-a-sync-code-style` OpenCI job applies this patch to the
`.clang-format` file used by the Linux kernel project to generate
TF-A's own code style configuration.

Change-Id: I4df42cfc6ed5ac91221fe141474d130d6b1c7677
Signed-off-by: Chris Kay <chris.kay@arm.com>
Merge "docs: discourage usage of weak functions" into integration 2023-03-06T19:38:28+00:00 Sandrine Bailleux sandrine.bailleux@arm.com 2023-03-06T19:38:28+00:00 2b7150b381f3497d391ec28e2f34be01b2968ada 






docs: discourage usage of weak functions
2023-03-06T18:25:41+00:00

Sandrine Bailleux
sandrine.bailleux@arm.com

2023-02-08T12:55:51+00:00

8a665973859733bded6150190c57bc2388bbfd2f

As a coding guideline, we now discourage introducing new weak
functions in platform-agnostic code going forward and provide the
rationale for this.

This was already enforced most of the time in code reviews but this
patch makes it explicit in the project's documentation.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I88f4a55788899fb4146c4d26afb3a7418376b30c





As a coding guideline, we now discourage introducing new weak
functions in platform-agnostic code going forward and provide the
rationale for this.

This was already enforced most of the time in code reviews but this
patch makes it explicit in the project's documentation.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I88f4a55788899fb4146c4d26afb3a7418376b30c







Merge "docs(spm): add other-s-interrupts-action field to sp manifest" into integration
2023-03-06T14:09:27+00:00

Madhukar Pappireddy
madhukar.pappireddy@arm.com

2023-03-06T14:09:27+00:00

48fb931536741c9972d804351c4cab549e37b85f












Merge "fix(zynqmp): conditional reservation of memory in DTB" into integration
2023-03-06T12:33:39+00:00

Joanna Farley
joanna.farley@arm.com

2023-03-06T12:33:39+00:00

567316071740a5196f79829b713a958c97835276












fix(zynqmp): conditional reservation of memory in DTB
2023-03-06T11:11:56+00:00

Akshay Belsare
akshay.belsare@amd.com

2023-02-27T06:34:26+00:00

c52a142b7ceb397b4d66cc90f2bc717acc7263cd

When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This creates an error condition in the use case where Device tree is
not present or it is present at a different location.

To fix this, a new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is
introduced. The TF-A will reserve the DDR memory only when a valid
DTB address is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired
DDR address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I846fa373ba9f7c984eda3a55ccaaa622082cad81
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>





When the TF-A is placed in DDR memory range, the DDR memory range is
getting explicitly reserved in the default device tree by TF-A.
This creates an error condition in the use case where Device tree is
not present or it is present at a different location.

To fix this, a new build time parameter, XILINX_OF_BOARD_DTB_ADDR, is
introduced. The TF-A will reserve the DDR memory only when a valid
DTB address is provided to XILINX_OF_BOARD_DTB_ADDR during build.

Now the user has options, either manually reserve the desired
DDR address range for TF-A in device tree or let TF-A access and modify
the device tree, to reserve the DDR address range, in runtime using
the build parameter.

Change-Id: I846fa373ba9f7c984eda3a55ccaaa622082cad81
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>