delta/coreboot/arm-trusted-firmware.git, branch dh/dual-lic review.coreboot.org: arm-trusted-firmware.git Update license information in readme.rst 2018-07-31T08:47:15+00:00 Dan Handley dan.handley@arm.com 2018-07-25T15:42:10+00:00 327cfc273fc63d20a73371e45cf549a961014042 Added information on how disjunctively dual licensed code from other projects is treated in the TF-A project. Change-Id: Idca329abba4d36bd3c4fd722ac1556940b9135a2 Signed-off-by: Dan Handley <dan.handley@arm.com> 
Added information on how disjunctively dual licensed code from
other projects is treated in the TF-A project.

Change-Id: Idca329abba4d36bd3c4fd722ac1556940b9135a2
Signed-off-by: Dan Handley <dan.handley@arm.com>
Merge pull request #1498 from glneo/cache-early-fixes 2018-07-30T15:53:34+00:00 Dimitris Papastamos dimitris.papastamos@arm.com 2018-07-30T15:53:34+00:00 72bc63185c37696877b189cf86c8f52d11911622 Early cache enable and coherency fixes 
Early cache enable and coherency fixes
 Merge pull request #1493 from antonio-nino-diaz-arm/an/xlat-misra 2018-07-30T15:44:43+00:00 Dimitris Papastamos dimitris.papastamos@arm.com 2018-07-30T15:44:43+00:00 2ee596c498b551a2bedc42e984e76de5aaa12bad Fix MISRA defects in xlat tables lib and SP805 driver 
Fix MISRA defects in xlat tables lib and SP805 driver
 Fix MISRA defects in SP805 driver 2018-07-30T08:30:15+00:00 Antonio Nino Diaz antonio.ninodiaz@arm.com 2018-07-24T10:27:52+00:00 354305c3cf14c429832f09b5246a7dffdec23f2d Fix violations of MISRA C-2012 Rules 10.1, 10.3 and 10.4. Change-Id: I13c6acda798c1666892f630f097a23e68748f9e4 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> 
Fix violations of MISRA C-2012 Rules 10.1, 10.3 and 10.4.

Change-Id: I13c6acda798c1666892f630f097a23e68748f9e4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
xlat: Fix MISRA defects 2018-07-30T08:30:15+00:00 Antonio Nino Diaz antonio.ninodiaz@arm.com 2018-07-24T09:20:53+00:00 e7b9886c7cbfac488b766b24379249853f78a040 Fix defects of MISRA C-2012 rules 8.13, 10.1, 10.3, 10.4, 10.8, 11.6, 14.4, 15.7, 17.8, 20.10, 20.12, 21.1 and Directive 4.9. Change-Id: I7ff61e71733908596dbafe2e99d99b4fce9765bd Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> 
Fix defects of MISRA C-2012 rules 8.13, 10.1, 10.3, 10.4, 10.8, 11.6,
14.4, 15.7, 17.8, 20.10, 20.12, 21.1 and Directive 4.9.

Change-Id: I7ff61e71733908596dbafe2e99d99b4fce9765bd
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Merge pull request #1497 from SNG-ARM/master 2018-07-27T10:03:13+00:00 Soby Mathew soby.mathew@arm.com 2018-07-27T10:03:13+00:00 eef90a772dc1c3b836c1e9304a22d805db3cf5b1 RAS changes for SGI575 platform 
RAS changes for SGI575 platform
 Merge pull request #1494 from hzhuang1/pcie_pin 2018-07-27T10:02:36+00:00 Soby Mathew soby.mathew@arm.com 2018-07-27T10:02:36+00:00 128dad9a20ca9fa93539d748737e28d168f2701c Hikey960: configure pins for PCIe controller 
Hikey960: configure pins for PCIe controller
 Hikey960: configure pins for PCIe controller 2018-07-27T08:24:23+00:00 Kaihua Zhong zhongkaihua@huawei.com 2018-07-16T09:33:48+00:00 16bec9c25bdd37779ea0bc8e5c6ce3ab26e58106 GPIO_089 connects to PCIE_PERST_N. It needs to be configured as output low. Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com> Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> 
GPIO_089 connects to PCIE_PERST_N. It needs to be configured as
output low.

Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Xiaowei Song <songxiaowei@hisilicon.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
ti: k3: common: Only enable caches early 2018-07-26T19:31:06+00:00 Andrew F. Davis afd@ti.com 2018-07-26T19:25:03+00:00 903f13d312dfc743c1df41edb9865bd017a0eec6 We can enter and exit coherency without any software operations, but HW_ASSISTED_COHERENCY has stronger implications that are causing issues. Until these can be resolved, only use the weaker WARMBOOT_ENABLE_DCACHE_EARLY flag. Signed-off-by: Andrew F. Davis <afd@ti.com> 
We can enter and exit coherency without any software operations,
but HW_ASSISTED_COHERENCY has stronger implications that are
causing issues. Until these can be resolved, only use the weaker
WARMBOOT_ENABLE_DCACHE_EARLY flag.

Signed-off-by: Andrew F. Davis <afd@ti.com>
GIC: Do not flush cache when unneeded 2018-07-26T19:14:07+00:00 Andrew F. Davis afd@ti.com 2018-07-26T18:50:14+00:00 9262eb54db167d432fe0856b5451039a1b948f6f When a platform enables its caches before it initializes the GICC/GICR interface then explicit cache maintenance is not needed. Remove these here. Signed-off-by: Andrew F. Davis <afd@ti.com> 
When a platform enables its caches before it initializes the
GICC/GICR interface then explicit cache maintenance is not
needed. Remove these here.

Signed-off-by: Andrew F. Davis <afd@ti.com>