# Makefile.in generated by automake 1.15.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2017 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright (C) 1993-2023 Free Software Foundation, Inc. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . VPATH = @srcdir@ am__is_gnu_make = { \ if test -z '$(MAKELEVEL)'; then \ false; \ elif test -n '$(MAKE_HOST)'; then \ true; \ elif test -n '$(MAKE_VERSION)' && test -n '$(CURDIR)'; then \ true; \ else \ false; \ fi; \ } am__make_running_with_option = \ case $${target_option-} in \ ?) ;; \ *) echo "am__make_running_with_option: internal error: invalid" \ "target option '$${target_option-}' specified" >&2; \ exit 1;; \ esac; \ has_opt=no; \ sane_makeflags=$$MAKEFLAGS; \ if $(am__is_gnu_make); then \ sane_makeflags=$$MFLAGS; \ else \ case $$MAKEFLAGS in \ *\\[\ \ ]*) \ bs=\\; \ sane_makeflags=`printf '%s\n' "$$MAKEFLAGS" \ | sed "s/$$bs$$bs[$$bs $$bs ]*//g"`;; \ esac; \ fi; \ skip_next=no; \ strip_trailopt () \ { \ flg=`printf '%s\n' "$$flg" | sed "s/$$1.*$$//"`; \ }; \ for flg in $$sane_makeflags; do \ test $$skip_next = yes && { skip_next=no; continue; }; \ case $$flg in \ *=*|--*) continue;; \ -*I) strip_trailopt 'I'; skip_next=yes;; \ -*I?*) strip_trailopt 'I';; \ -*O) strip_trailopt 'O'; skip_next=yes;; \ -*O?*) strip_trailopt 'O';; \ -*l) strip_trailopt 'l'; skip_next=yes;; \ -*l?*) strip_trailopt 'l';; \ -[dEDm]) skip_next=yes;; \ -[JT]) skip_next=yes;; \ esac; \ case $$flg in \ *$$target_option*) has_opt=yes; break;; \ esac; \ done; \ test $$has_opt = yes am__make_dryrun = (target_option=n; $(am__make_running_with_option)) am__make_keepgoing = (target_option=k; $(am__make_running_with_option)) pkgdatadir = $(datadir)/@PACKAGE@ pkgincludedir = $(includedir)/@PACKAGE@ pkglibdir = $(libdir)/@PACKAGE@ pkglibexecdir = $(libexecdir)/@PACKAGE@ am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd install_sh_DATA = $(install_sh) -c -m 644 install_sh_PROGRAM = $(install_sh) -c install_sh_SCRIPT = $(install_sh) -c INSTALL_HEADER = $(INSTALL_DATA) transform = $(program_transform_name) NORMAL_INSTALL = : PRE_INSTALL = : POST_INSTALL = : NORMAL_UNINSTALL = : PRE_UNINSTALL = : POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ check_PROGRAMS = $(am__EXEEXT_7) $(am__EXEEXT_8) noinst_PROGRAMS = $(am__EXEEXT_9) $(am__EXEEXT_10) $(am__EXEEXT_11) \ $(am__EXEEXT_12) $(am__EXEEXT_13) $(am__EXEEXT_14) \ $(am__EXEEXT_15) $(am__EXEEXT_16) $(am__EXEEXT_17) \ $(am__EXEEXT_18) $(am__EXEEXT_19) $(am__EXEEXT_20) \ $(am__EXEEXT_21) $(am__EXEEXT_22) $(am__EXEEXT_23) \ $(am__EXEEXT_24) $(am__EXEEXT_25) $(am__EXEEXT_26) \ $(am__EXEEXT_27) $(am__EXEEXT_28) $(am__EXEEXT_29) \ $(am__EXEEXT_30) $(am__EXEEXT_31) $(am__EXEEXT_32) \ $(am__EXEEXT_33) $(am__EXEEXT_34) $(am__EXEEXT_35) \ $(am__EXEEXT_36) $(am__EXEEXT_37) $(am__EXEEXT_38) \ $(am__EXEEXT_39) $(am__EXEEXT_40) EXTRA_PROGRAMS = $(am__EXEEXT_1) testsuite/common/bits-gen$(EXEEXT) \ testsuite/common/fpu-tst$(EXEEXT) $(am__EXEEXT_2) \ $(am__EXEEXT_3) $(am__EXEEXT_4) $(am__EXEEXT_5) \ $(am__EXEEXT_6) @ENABLE_SIM_TRUE@am__append_1 = \ @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/callback.h \ @ENABLE_SIM_TRUE@ $(srcroot)/include/sim/sim.h @SIM_ENABLE_HW_TRUE@am__append_2 = \ @SIM_ENABLE_HW_TRUE@ $(SIM_COMMON_HW_OBJS) \ @SIM_ENABLE_HW_TRUE@ $(SIM_HW_SOCKSER) TESTS = testsuite/common/bits32m0$(EXEEXT) \ testsuite/common/bits32m31$(EXEEXT) \ testsuite/common/bits64m0$(EXEEXT) \ testsuite/common/bits64m63$(EXEEXT) \ testsuite/common/alu-tst$(EXEEXT) @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_3 = aarch64/libsim.a @SIM_ENABLE_ARCH_aarch64_TRUE@am__append_4 = aarch64/run @SIM_ENABLE_ARCH_arm_TRUE@am__append_5 = arm/libsim.a @SIM_ENABLE_ARCH_arm_TRUE@am__append_6 = arm/run @SIM_ENABLE_ARCH_avr_TRUE@am__append_7 = avr/libsim.a @SIM_ENABLE_ARCH_avr_TRUE@am__append_8 = avr/run @SIM_ENABLE_ARCH_bfin_TRUE@am__append_9 = bfin/libsim.a @SIM_ENABLE_ARCH_bfin_TRUE@am__append_10 = bfin/run @SIM_ENABLE_ARCH_bpf_TRUE@am__append_11 = bpf/libsim.a @SIM_ENABLE_ARCH_bpf_TRUE@am__append_12 = bpf/run @SIM_ENABLE_ARCH_bpf_TRUE@am__append_13 = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h @SIM_ENABLE_ARCH_bpf_TRUE@am__append_14 = $(bpf_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cr16_TRUE@am__append_15 = cr16/libsim.a @SIM_ENABLE_ARCH_cr16_TRUE@am__append_16 = cr16/run @SIM_ENABLE_ARCH_cr16_TRUE@am__append_17 = cr16/simops.h @SIM_ENABLE_ARCH_cr16_TRUE@am__append_18 = cr16/gencode @SIM_ENABLE_ARCH_cr16_TRUE@am__append_19 = $(cr16_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cris_TRUE@am__append_20 = cris/libsim.a @SIM_ENABLE_ARCH_cris_TRUE@am__append_21 = cris/run @SIM_ENABLE_ARCH_cris_TRUE@am__append_22 = cris/rvdummy @SIM_ENABLE_ARCH_cris_TRUE@am__append_23 = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h @SIM_ENABLE_ARCH_cris_TRUE@am__append_24 = $(cris_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_d10v_TRUE@am__append_25 = d10v/libsim.a @SIM_ENABLE_ARCH_d10v_TRUE@am__append_26 = d10v/run @SIM_ENABLE_ARCH_d10v_TRUE@am__append_27 = d10v/simops.h @SIM_ENABLE_ARCH_d10v_TRUE@am__append_28 = d10v/gencode @SIM_ENABLE_ARCH_d10v_TRUE@am__append_29 = $(d10v_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_erc32_TRUE@am__append_30 = erc32/libsim.a @SIM_ENABLE_ARCH_erc32_TRUE@am__append_31 = erc32/run erc32/sis @SIM_ENABLE_ARCH_erc32_TRUE@am__append_32 = sim-%D-install-exec-local @SIM_ENABLE_ARCH_erc32_TRUE@am__append_33 = sim-erc32-uninstall-local @SIM_ENABLE_ARCH_examples_TRUE@am__append_34 = example-synacor/libsim.a @SIM_ENABLE_ARCH_examples_TRUE@am__append_35 = example-synacor/run @SIM_ENABLE_ARCH_frv_TRUE@am__append_36 = frv/libsim.a @SIM_ENABLE_ARCH_frv_TRUE@am__append_37 = frv/run @SIM_ENABLE_ARCH_frv_TRUE@am__append_38 = frv/eng.h @SIM_ENABLE_ARCH_frv_TRUE@am__append_39 = $(frv_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_ft32_TRUE@am__append_40 = ft32/libsim.a @SIM_ENABLE_ARCH_ft32_TRUE@am__append_41 = ft32/run @SIM_ENABLE_ARCH_h8300_TRUE@am__append_42 = h8300/libsim.a @SIM_ENABLE_ARCH_h8300_TRUE@am__append_43 = h8300/run @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_44 = iq2000/libsim.a @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_45 = iq2000/run @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_46 = iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@am__append_47 = $(iq2000_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_lm32_TRUE@am__append_48 = lm32/libsim.a @SIM_ENABLE_ARCH_lm32_TRUE@am__append_49 = lm32/run @SIM_ENABLE_ARCH_lm32_TRUE@am__append_50 = lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@am__append_51 = $(lm32_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32c_TRUE@am__append_52 = m32c/libsim.a @SIM_ENABLE_ARCH_m32c_TRUE@am__append_53 = m32c/run @SIM_ENABLE_ARCH_m32c_TRUE@am__append_54 = m32c/opc2c @SIM_ENABLE_ARCH_m32c_TRUE@am__append_55 = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(m32c_BUILD_OUTPUTS) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c.log \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c.log @SIM_ENABLE_ARCH_m32r_TRUE@am__append_56 = m32r/libsim.a @SIM_ENABLE_ARCH_m32r_TRUE@am__append_57 = m32r/run @SIM_ENABLE_ARCH_m32r_TRUE@am__append_58 = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h @SIM_ENABLE_ARCH_m32r_TRUE@am__append_59 = $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_60 = m68hc11/libsim.a @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_61 = m68hc11/run @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_62 = m68hc11/gencode @SIM_ENABLE_ARCH_m68hc11_TRUE@am__append_63 = $(m68hc11_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mcore_TRUE@am__append_64 = mcore/libsim.a @SIM_ENABLE_ARCH_mcore_TRUE@am__append_65 = mcore/run @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_66 = microblaze/libsim.a @SIM_ENABLE_ARCH_microblaze_TRUE@am__append_67 = microblaze/run @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_68 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/support.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/semantics.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/idecode.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/icache.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/engine.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/irun.o @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_69 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_support.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_semantics.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_idecode.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16_icache.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_support.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_semantics.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_idecode.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m32_icache.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/m16run.o @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_70 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_OBJ) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o @SIM_ENABLE_ARCH_mips_TRUE@am__append_71 = mips/libsim.a @SIM_ENABLE_ARCH_mips_TRUE@am__append_72 = mips/run @SIM_ENABLE_ARCH_mips_TRUE@am__append_73 = mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_MULTI_SRC) @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@am__append_74 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_SINGLE_TRUE@ mips/stamp-gen-mode-single @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@am__append_75 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ $(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m16 \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_M16_TRUE@ mips/stamp-gen-mode-m16-m32 @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__append_76 = \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ $(SIM_MIPS_MULTI_SRC) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-igen \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/stamp-gen-mode-multi-run @SIM_ENABLE_ARCH_mips_TRUE@am__append_77 = $(mips_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mips_TRUE@am__append_78 = mips/multi-include.h mips/multi-run.c @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_79 = mn10300/libsim.a @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_80 = mn10300/run @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_81 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_82 = $(mn10300_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_moxie_TRUE@am__append_83 = moxie/libsim.a @SIM_ENABLE_ARCH_moxie_TRUE@am__append_84 = moxie/run @SIM_ENABLE_ARCH_msp430_TRUE@am__append_85 = msp430/libsim.a @SIM_ENABLE_ARCH_msp430_TRUE@am__append_86 = msp430/run @SIM_ENABLE_ARCH_or1k_TRUE@am__append_87 = or1k/libsim.a @SIM_ENABLE_ARCH_or1k_TRUE@am__append_88 = or1k/run @SIM_ENABLE_ARCH_or1k_TRUE@am__append_89 = or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@am__append_90 = $(or1k_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_ppc_TRUE@am__append_91 = common/libcommon.a @SIM_ENABLE_ARCH_ppc_TRUE@am__append_92 = ppc/run @SIM_ENABLE_ARCH_pru_TRUE@am__append_93 = pru/libsim.a @SIM_ENABLE_ARCH_pru_TRUE@am__append_94 = pru/run @SIM_ENABLE_ARCH_riscv_TRUE@am__append_95 = riscv/libsim.a @SIM_ENABLE_ARCH_riscv_TRUE@am__append_96 = riscv/run @SIM_ENABLE_ARCH_rl78_TRUE@am__append_97 = rl78/libsim.a @SIM_ENABLE_ARCH_rl78_TRUE@am__append_98 = rl78/run @SIM_ENABLE_ARCH_rx_TRUE@am__append_99 = rx/libsim.a @SIM_ENABLE_ARCH_rx_TRUE@am__append_100 = rx/run @SIM_ENABLE_ARCH_sh_TRUE@am__append_101 = sh/libsim.a @SIM_ENABLE_ARCH_sh_TRUE@am__append_102 = sh/run @SIM_ENABLE_ARCH_sh_TRUE@am__append_103 = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c @SIM_ENABLE_ARCH_sh_TRUE@am__append_104 = sh/gencode @SIM_ENABLE_ARCH_sh_TRUE@am__append_105 = $(sh_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@am__append_106 = v850/libsim.a @SIM_ENABLE_ARCH_v850_TRUE@am__append_107 = v850/run @SIM_ENABLE_ARCH_v850_TRUE@am__append_108 = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h @SIM_ENABLE_ARCH_v850_TRUE@am__append_109 = $(v850_BUILD_OUTPUTS) subdir = . ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \ $(top_srcdir)/../config/depstand.m4 \ $(top_srcdir)/../config/lead-dot.m4 \ $(top_srcdir)/../config/override.m4 \ $(top_srcdir)/../config/pkg.m4 $(top_srcdir)/../libtool.m4 \ $(top_srcdir)/../ltoptions.m4 $(top_srcdir)/../ltsugar.m4 \ $(top_srcdir)/../ltversion.m4 $(top_srcdir)/../lt~obsolete.m4 \ $(top_srcdir)/m4/sim_ac_option_alignment.m4 \ $(top_srcdir)/m4/sim_ac_option_assert.m4 \ $(top_srcdir)/m4/sim_ac_option_cgen_maint.m4 \ $(top_srcdir)/m4/sim_ac_option_debug.m4 \ $(top_srcdir)/m4/sim_ac_option_endian.m4 \ $(top_srcdir)/m4/sim_ac_option_environment.m4 \ $(top_srcdir)/m4/sim_ac_option_hardware.m4 \ $(top_srcdir)/m4/sim_ac_option_inline.m4 \ $(top_srcdir)/m4/sim_ac_option_profile.m4 \ $(top_srcdir)/m4/sim_ac_option_reserved_bits.m4 \ $(top_srcdir)/m4/sim_ac_option_scache.m4 \ $(top_srcdir)/m4/sim_ac_option_smp.m4 \ $(top_srcdir)/m4/sim_ac_option_stdio.m4 \ $(top_srcdir)/m4/sim_ac_option_trace.m4 \ $(top_srcdir)/m4/sim_ac_option_warnings.m4 \ $(top_srcdir)/m4/sim_ac_platform.m4 \ $(top_srcdir)/m4/sim_ac_toolchain.m4 \ $(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/mips/acinclude.m4 \ $(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \ $(top_srcdir)/configure.ac am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ $(ACLOCAL_M4) DIST_COMMON = $(srcdir)/Makefile.am $(top_srcdir)/configure \ $(am__configure_deps) $(am__pkginclude_HEADERS_DIST) am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \ configure.lineno config.status.lineno mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs CONFIG_HEADER = config.h CONFIG_CLEAN_FILES = aarch64/.gdbinit arm/.gdbinit avr/.gdbinit \ bfin/.gdbinit bpf/.gdbinit cr16/.gdbinit cris/.gdbinit \ d10v/.gdbinit frv/.gdbinit ft32/.gdbinit h8300/.gdbinit \ iq2000/.gdbinit lm32/.gdbinit m32c/.gdbinit m32r/.gdbinit \ m68hc11/.gdbinit mcore/.gdbinit microblaze/.gdbinit \ mips/.gdbinit mn10300/.gdbinit moxie/.gdbinit msp430/.gdbinit \ or1k/.gdbinit ppc/.gdbinit pru/.gdbinit riscv/.gdbinit \ rl78/.gdbinit rx/.gdbinit sh/.gdbinit erc32/.gdbinit \ v850/.gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit CONFIG_CLEAN_VPATH_FILES = LIBRARIES = $(noinst_LIBRARIES) ARFLAGS = cru AM_V_AR = $(am__v_AR_@AM_V@) am__v_AR_ = $(am__v_AR_@AM_DEFAULT_V@) am__v_AR_0 = @echo " AR " $@; am__v_AR_1 = aarch64_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_aarch64_TRUE@ %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o am__dirstamp = $(am__leading_dot)dirstamp am__objects_1 = common/callback.$(OBJEXT) common/portability.$(OBJEXT) \ common/sim-load.$(OBJEXT) common/sim-signal.$(OBJEXT) \ common/syscall.$(OBJEXT) common/target-newlib-errno.$(OBJEXT) \ common/target-newlib-open.$(OBJEXT) \ common/target-newlib-signal.$(OBJEXT) \ common/target-newlib-syscall.$(OBJEXT) \ common/version.$(OBJEXT) @SIM_ENABLE_ARCH_aarch64_TRUE@am_aarch64_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.$(OBJEXT) aarch64_libsim_a_OBJECTS = $(am_aarch64_libsim_a_OBJECTS) \ $(nodist_aarch64_libsim_a_OBJECTS) arm_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_DEPENDENCIES = arm/wrapper.o \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_arm_TRUE@ %,arm/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o arm/armemu32.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/arminit.o arm/armos.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armsupp.o arm/armvirt.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/thumbemu.o arm/armcopro.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/maverick.o arm/iwmmxt.o @SIM_ENABLE_ARCH_arm_TRUE@am_arm_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.$(OBJEXT) arm_libsim_a_OBJECTS = $(am_arm_libsim_a_OBJECTS) \ $(nodist_arm_libsim_a_OBJECTS) avr_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_DEPENDENCIES = avr/interp.o \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_avr_TRUE@ %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o @SIM_ENABLE_ARCH_avr_TRUE@am_avr_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.$(OBJEXT) avr_libsim_a_OBJECTS = $(am_avr_libsim_a_OBJECTS) \ $(nodist_avr_libsim_a_OBJECTS) bfin_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_bfin_TRUE@ %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o bfin/devices.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o bfin/interp.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o bfin/sim-resume.o @SIM_ENABLE_ARCH_bfin_TRUE@am_bfin_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.$(OBJEXT) bfin_libsim_a_OBJECTS = $(am_bfin_libsim_a_OBJECTS) \ $(nodist_bfin_libsim_a_OBJECTS) bpf_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_bpf_TRUE@ %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o bpf/cgen-scache.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o bpf/cgen-utils.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o bpf/cpu.o bpf/decode-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o bpf/sem-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o bpf/mloop-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o bpf/bpf.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o bpf/sim-if.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o @SIM_ENABLE_ARCH_bpf_TRUE@am_bpf_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.$(OBJEXT) bpf_libsim_a_OBJECTS = $(am_bpf_libsim_a_OBJECTS) \ $(nodist_bpf_libsim_a_OBJECTS) common_libcommon_a_AR = $(AR) $(ARFLAGS) common_libcommon_a_LIBADD = am_common_libcommon_a_OBJECTS = common/callback.$(OBJEXT) \ common/portability.$(OBJEXT) common/sim-load.$(OBJEXT) \ common/sim-signal.$(OBJEXT) common/syscall.$(OBJEXT) \ common/target-newlib-errno.$(OBJEXT) \ common/target-newlib-open.$(OBJEXT) \ common/target-newlib-signal.$(OBJEXT) \ common/target-newlib-syscall.$(OBJEXT) \ common/version.$(OBJEXT) common_libcommon_a_OBJECTS = $(am_common_libcommon_a_OBJECTS) cr16_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_cr16_TRUE@ %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o cr16/sim-resume.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o cr16/table.o @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.$(OBJEXT) cr16_libsim_a_OBJECTS = $(am_cr16_libsim_a_OBJECTS) \ $(nodist_cr16_libsim_a_OBJECTS) cris_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_cris_TRUE@ %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o cris/cgen-scache.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o cris/cgen-utils.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o cris/crisv10f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o cris/decodev10.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o cris/mloopv10f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o cris/cpuv32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o cris/modelv32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o cris/sim-if.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o @SIM_ENABLE_ARCH_cris_TRUE@am_cris_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_cris_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.$(OBJEXT) cris_libsim_a_OBJECTS = $(am_cris_libsim_a_OBJECTS) \ $(nodist_cris_libsim_a_OBJECTS) d10v_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_DEPENDENCIES = d10v/interp.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_d10v_TRUE@ %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o d10v/sim-resume.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o d10v/table.o @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.$(OBJEXT) d10v_libsim_a_OBJECTS = $(am_d10v_libsim_a_OBJECTS) \ $(nodist_d10v_libsim_a_OBJECTS) erc32_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o erc32/exec.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o erc32/func.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o erc32/interf.o @SIM_ENABLE_ARCH_erc32_TRUE@am_erc32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.$(OBJEXT) erc32_libsim_a_OBJECTS = $(am_erc32_libsim_a_OBJECTS) \ $(nodist_erc32_libsim_a_OBJECTS) example_synacor_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_examples_TRUE@ %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o @SIM_ENABLE_ARCH_examples_TRUE@am_example_synacor_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_examples_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_OBJECTS = example-synacor/modules.$(OBJEXT) example_synacor_libsim_a_OBJECTS = \ $(am_example_synacor_libsim_a_OBJECTS) \ $(nodist_example_synacor_libsim_a_OBJECTS) frv_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_frv_TRUE@ %,frv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o frv/cgen-fpu.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o frv/cgen-scache.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o frv/cgen-utils.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o frv/cgen-par.o frv/cpu.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o frv/frv.o frv/mloop.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o frv/sem.o frv/cache.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o frv/memory.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o frv/pipeline.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o frv/profile-fr400.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o frv/registers.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o frv/sim-if.o frv/traps.o @SIM_ENABLE_ARCH_frv_TRUE@am_frv_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.$(OBJEXT) frv_libsim_a_OBJECTS = $(am_frv_libsim_a_OBJECTS) \ $(nodist_frv_libsim_a_OBJECTS) ft32_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_ft32_TRUE@ %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o ft32/sim-resume.o @SIM_ENABLE_ARCH_ft32_TRUE@am_ft32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.$(OBJEXT) ft32_libsim_a_OBJECTS = $(am_ft32_libsim_a_OBJECTS) \ $(nodist_ft32_libsim_a_OBJECTS) h8300_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o $(patsubst \ @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_h8300_TRUE@ %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o @SIM_ENABLE_ARCH_h8300_TRUE@am_h8300_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.$(OBJEXT) h8300_libsim_a_OBJECTS = $(am_h8300_libsim_a_OBJECTS) \ $(nodist_h8300_libsim_a_OBJECTS) igen_libigen_a_AR = $(AR) $(ARFLAGS) igen_libigen_a_LIBADD = am_igen_libigen_a_OBJECTS = igen/table.$(OBJEXT) igen/lf.$(OBJEXT) \ igen/misc.$(OBJEXT) igen/filter_host.$(OBJEXT) \ igen/ld-decode.$(OBJEXT) igen/ld-cache.$(OBJEXT) \ igen/filter.$(OBJEXT) igen/ld-insn.$(OBJEXT) \ igen/gen-model.$(OBJEXT) igen/gen-itable.$(OBJEXT) \ igen/gen-icache.$(OBJEXT) igen/gen-semantics.$(OBJEXT) \ igen/gen-idecode.$(OBJEXT) igen/gen-support.$(OBJEXT) \ igen/gen-engine.$(OBJEXT) igen/gen.$(OBJEXT) igen_libigen_a_OBJECTS = $(am_igen_libigen_a_OBJECTS) iq2000_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_iq2000_TRUE@ %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o iq2000/arch.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o iq2000/decode.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o iq2000/sem.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o iq2000/model.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o @SIM_ENABLE_ARCH_iq2000_TRUE@am_iq2000_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.$(OBJEXT) iq2000_libsim_a_OBJECTS = $(am_iq2000_libsim_a_OBJECTS) \ $(nodist_iq2000_libsim_a_OBJECTS) lm32_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_lm32_TRUE@ %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o lm32/cgen-scache.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o lm32/cgen-utils.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o lm32/cpu.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o lm32/sem.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o lm32/model.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o lm32/sim-if.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o lm32/user.o @SIM_ENABLE_ARCH_lm32_TRUE@am_lm32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.$(OBJEXT) lm32_libsim_a_OBJECTS = $(am_lm32_libsim_a_OBJECTS) \ $(nodist_lm32_libsim_a_OBJECTS) m32c_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_DEPENDENCIES = m32c/gdb-if.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o m32c/load.o m32c/m32c.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o m32c/misc.o m32c/r8c.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o m32c/srcdest.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o m32c/trace.o @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.$(OBJEXT) m32c_libsim_a_OBJECTS = $(am_m32c_libsim_a_OBJECTS) \ $(nodist_m32c_libsim_a_OBJECTS) m32r_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_m32r_TRUE@ %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o m32r/cgen-scache.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o m32r/cgen-utils.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o m32r/m32r.o m32r/cpu.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o m32r/sem.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o m32r/mloop.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o m32r/cpux.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o m32r/modelx.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o m32r/m32r2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o m32r/decode2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o m32r/mloop2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o m32r/traps.o @SIM_ENABLE_ARCH_m32r_TRUE@am_m32r_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.$(OBJEXT) m32r_libsim_a_OBJECTS = $(am_m32r_libsim_a_OBJECTS) \ $(nodist_m32r_libsim_a_OBJECTS) m68hc11_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o $(patsubst \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.$(OBJEXT) m68hc11_libsim_a_OBJECTS = $(am_m68hc11_libsim_a_OBJECTS) \ $(nodist_m68hc11_libsim_a_OBJECTS) mcore_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o $(patsubst \ @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mcore_TRUE@ %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o @SIM_ENABLE_ARCH_mcore_TRUE@am_mcore_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.$(OBJEXT) mcore_libsim_a_OBJECTS = $(am_mcore_libsim_a_OBJECTS) \ $(nodist_mcore_libsim_a_OBJECTS) microblaze_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_microblaze_TRUE@ %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o @SIM_ENABLE_ARCH_microblaze_TRUE@am_microblaze_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.$(OBJEXT) microblaze_libsim_a_OBJECTS = $(am_microblaze_libsim_a_OBJECTS) \ $(nodist_microblaze_libsim_a_OBJECTS) mips_libsim_a_AR = $(AR) $(ARFLAGS) am__DEPENDENCIES_1 = @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@am__DEPENDENCIES_2 = $(am__DEPENDENCIES_1) \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/itable.o \ @SIM_ENABLE_ARCH_mips_TRUE@@SIM_MIPS_GEN_MODE_MULTI_TRUE@ mips/multi-run.o @SIM_ENABLE_ARCH_mips_TRUE@am__DEPENDENCIES_3 = $(am__append_68) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_69) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_2) @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_DEPENDENCIES = mips/interp.o \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__DEPENDENCIES_3) $(patsubst \ @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mips_TRUE@ %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o mips/dsp.o mips/mdmx.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-main.o mips/sim-resume.o @SIM_ENABLE_ARCH_mips_TRUE@am_mips_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.$(OBJEXT) mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS) \ $(nodist_mips_libsim_a_OBJECTS) mn10300_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o mn10300/irun.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o $(patsubst \ @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o @SIM_ENABLE_ARCH_mn10300_TRUE@am_mn10300_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.$(OBJEXT) mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS) \ $(nodist_mn10300_libsim_a_OBJECTS) moxie_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_moxie_TRUE@ %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o moxie/sim-resume.o @SIM_ENABLE_ARCH_moxie_TRUE@am_moxie_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/modules.$(OBJEXT) moxie_libsim_a_OBJECTS = $(am_moxie_libsim_a_OBJECTS) \ $(nodist_moxie_libsim_a_OBJECTS) msp430_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_DEPENDENCIES = \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_msp430_TRUE@ %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o @SIM_ENABLE_ARCH_msp430_TRUE@am_msp430_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.$(OBJEXT) msp430_libsim_a_OBJECTS = $(am_msp430_libsim_a_OBJECTS) \ $(nodist_msp430_libsim_a_OBJECTS) or1k_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_or1k_TRUE@ %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o or1k/cgen-fpu.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o or1k/cgen-scache.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o or1k/cgen-utils.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o or1k/cpu.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o or1k/mloop.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o or1k/sem.o or1k/or1k.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o or1k/traps.o @SIM_ENABLE_ARCH_or1k_TRUE@am_or1k_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.$(OBJEXT) or1k_libsim_a_OBJECTS = $(am_or1k_libsim_a_OBJECTS) \ $(nodist_or1k_libsim_a_OBJECTS) pru_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_pru_TRUE@ %,pru/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o pru/sim-resume.o @SIM_ENABLE_ARCH_pru_TRUE@am_pru_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/modules.$(OBJEXT) pru_libsim_a_OBJECTS = $(am_pru_libsim_a_OBJECTS) \ $(nodist_pru_libsim_a_OBJECTS) riscv_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_riscv_TRUE@ %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o riscv/machs.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-main.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o @SIM_ENABLE_ARCH_riscv_TRUE@am_riscv_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.$(OBJEXT) riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) \ $(nodist_riscv_libsim_a_OBJECTS) rl78_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_DEPENDENCIES = rl78/load.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o rl78/cpu.o rl78/rl78.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o rl78/trace.o @SIM_ENABLE_ARCH_rl78_TRUE@am_rl78_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_rl78_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.$(OBJEXT) rl78_libsim_a_OBJECTS = $(am_rl78_libsim_a_OBJECTS) \ $(nodist_rl78_libsim_a_OBJECTS) rx_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_DEPENDENCIES = rx/fpu.o rx/load.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o rx/misc.o rx/reg.o rx/rx.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o rx/trace.o rx/gdb-if.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o @SIM_ENABLE_ARCH_rx_TRUE@am_rx_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.$(OBJEXT) rx_libsim_a_OBJECTS = $(am_rx_libsim_a_OBJECTS) \ $(nodist_rx_libsim_a_OBJECTS) sh_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_DEPENDENCIES = sh/interp.o \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_sh_TRUE@ %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o @SIM_ENABLE_ARCH_sh_TRUE@am_sh_libsim_a_OBJECTS = $(am__objects_1) @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.$(OBJEXT) sh_libsim_a_OBJECTS = $(am_sh_libsim_a_OBJECTS) \ $(nodist_sh_libsim_a_OBJECTS) v850_libsim_a_AR = $(AR) $(ARFLAGS) @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_DEPENDENCIES = $(patsubst \ @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst \ @SIM_ENABLE_ARCH_v850_TRUE@ %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o v850/interp.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o v850/semantics.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o v850/icache.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o v850/irun.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o v850/sim-resume.o @SIM_ENABLE_ARCH_v850_TRUE@am_v850_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_v850_TRUE@ $(am__objects_1) @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_OBJECTS = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.$(OBJEXT) v850_libsim_a_OBJECTS = $(am_v850_libsim_a_OBJECTS) \ $(nodist_v850_libsim_a_OBJECTS) am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) igen/gen$(EXEEXT) \ igen/ld-cache$(EXEEXT) igen/ld-decode$(EXEEXT) \ igen/ld-insn$(EXEEXT) igen/table$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_2 = cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_3 = d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_4 = m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_5 = m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_6 = sh/gencode$(EXEEXT) am__EXEEXT_7 = testsuite/common/bits32m0$(EXEEXT) \ testsuite/common/bits32m31$(EXEEXT) \ testsuite/common/bits64m0$(EXEEXT) \ testsuite/common/bits64m63$(EXEEXT) \ testsuite/common/alu-tst$(EXEEXT) @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_8 = cris/rvdummy$(EXEEXT) @SIM_ENABLE_ARCH_aarch64_TRUE@am__EXEEXT_9 = aarch64/run$(EXEEXT) @SIM_ENABLE_ARCH_arm_TRUE@am__EXEEXT_10 = arm/run$(EXEEXT) @SIM_ENABLE_ARCH_avr_TRUE@am__EXEEXT_11 = avr/run$(EXEEXT) @SIM_ENABLE_ARCH_bfin_TRUE@am__EXEEXT_12 = bfin/run$(EXEEXT) @SIM_ENABLE_ARCH_bpf_TRUE@am__EXEEXT_13 = bpf/run$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@am__EXEEXT_14 = cr16/run$(EXEEXT) @SIM_ENABLE_ARCH_cris_TRUE@am__EXEEXT_15 = cris/run$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@am__EXEEXT_16 = d10v/run$(EXEEXT) @SIM_ENABLE_ARCH_erc32_TRUE@am__EXEEXT_17 = erc32/run$(EXEEXT) \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis$(EXEEXT) @SIM_ENABLE_ARCH_examples_TRUE@am__EXEEXT_18 = \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/run$(EXEEXT) @SIM_ENABLE_ARCH_frv_TRUE@am__EXEEXT_19 = frv/run$(EXEEXT) @SIM_ENABLE_ARCH_ft32_TRUE@am__EXEEXT_20 = ft32/run$(EXEEXT) @SIM_ENABLE_ARCH_h8300_TRUE@am__EXEEXT_21 = h8300/run$(EXEEXT) @SIM_ENABLE_ARCH_iq2000_TRUE@am__EXEEXT_22 = iq2000/run$(EXEEXT) @SIM_ENABLE_ARCH_lm32_TRUE@am__EXEEXT_23 = lm32/run$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@am__EXEEXT_24 = m32c/run$(EXEEXT) @SIM_ENABLE_ARCH_m32r_TRUE@am__EXEEXT_25 = m32r/run$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@am__EXEEXT_26 = m68hc11/run$(EXEEXT) @SIM_ENABLE_ARCH_mcore_TRUE@am__EXEEXT_27 = mcore/run$(EXEEXT) @SIM_ENABLE_ARCH_microblaze_TRUE@am__EXEEXT_28 = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/run$(EXEEXT) @SIM_ENABLE_ARCH_mips_TRUE@am__EXEEXT_29 = mips/run$(EXEEXT) @SIM_ENABLE_ARCH_mn10300_TRUE@am__EXEEXT_30 = mn10300/run$(EXEEXT) @SIM_ENABLE_ARCH_moxie_TRUE@am__EXEEXT_31 = moxie/run$(EXEEXT) @SIM_ENABLE_ARCH_msp430_TRUE@am__EXEEXT_32 = msp430/run$(EXEEXT) @SIM_ENABLE_ARCH_or1k_TRUE@am__EXEEXT_33 = or1k/run$(EXEEXT) @SIM_ENABLE_ARCH_ppc_TRUE@am__EXEEXT_34 = ppc/run$(EXEEXT) @SIM_ENABLE_ARCH_pru_TRUE@am__EXEEXT_35 = pru/run$(EXEEXT) @SIM_ENABLE_ARCH_riscv_TRUE@am__EXEEXT_36 = riscv/run$(EXEEXT) @SIM_ENABLE_ARCH_rl78_TRUE@am__EXEEXT_37 = rl78/run$(EXEEXT) @SIM_ENABLE_ARCH_rx_TRUE@am__EXEEXT_38 = rx/run$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@am__EXEEXT_39 = sh/run$(EXEEXT) @SIM_ENABLE_ARCH_v850_TRUE@am__EXEEXT_40 = v850/run$(EXEEXT) PROGRAMS = $(noinst_PROGRAMS) am_aarch64_run_OBJECTS = aarch64_run_OBJECTS = $(am_aarch64_run_OBJECTS) am__DEPENDENCIES_4 = $(BFD_LIB) $(OPCODES_LIB) $(LIBIBERTY_LIB) @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_DEPENDENCIES = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o aarch64/libsim.a \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(am__DEPENDENCIES_4) AM_V_lt = $(am__v_lt_@AM_V@) am__v_lt_ = $(am__v_lt_@AM_DEFAULT_V@) am__v_lt_0 = --silent am__v_lt_1 = am_arm_run_OBJECTS = arm_run_OBJECTS = $(am_arm_run_OBJECTS) @SIM_ENABLE_ARCH_arm_TRUE@arm_run_DEPENDENCIES = arm/nrun.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a $(am__DEPENDENCIES_4) am_avr_run_OBJECTS = avr_run_OBJECTS = $(am_avr_run_OBJECTS) @SIM_ENABLE_ARCH_avr_TRUE@avr_run_DEPENDENCIES = avr/nrun.o \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a $(am__DEPENDENCIES_4) am_bfin_run_OBJECTS = bfin_run_OBJECTS = $(am_bfin_run_OBJECTS) @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_DEPENDENCIES = bfin/nrun.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a $(am__DEPENDENCIES_4) am_bpf_run_OBJECTS = bpf_run_OBJECTS = $(am_bpf_run_OBJECTS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_DEPENDENCIES = bpf/nrun.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a $(am__DEPENDENCIES_4) @SIM_ENABLE_ARCH_cr16_TRUE@am_cr16_gencode_OBJECTS = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode.$(OBJEXT) cr16_gencode_OBJECTS = $(am_cr16_gencode_OBJECTS) @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_DEPENDENCIES = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/cr16-opc.o am_cr16_run_OBJECTS = cr16_run_OBJECTS = $(am_cr16_run_OBJECTS) @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_DEPENDENCIES = cr16/nrun.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a $(am__DEPENDENCIES_4) am_cris_run_OBJECTS = cris_run_OBJECTS = $(am_cris_run_OBJECTS) @SIM_ENABLE_ARCH_cris_TRUE@cris_run_DEPENDENCIES = cris/nrun.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a $(am__DEPENDENCIES_4) @SIM_ENABLE_ARCH_cris_TRUE@am_cris_rvdummy_OBJECTS = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/rvdummy.$(OBJEXT) cris_rvdummy_OBJECTS = $(am_cris_rvdummy_OBJECTS) @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_DEPENDENCIES = \ @SIM_ENABLE_ARCH_cris_TRUE@ $(LIBIBERTY_LIB) @SIM_ENABLE_ARCH_d10v_TRUE@am_d10v_gencode_OBJECTS = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode.$(OBJEXT) d10v_gencode_OBJECTS = $(am_d10v_gencode_OBJECTS) @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_DEPENDENCIES = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/d10v-opc.o am_d10v_run_OBJECTS = d10v_run_OBJECTS = $(am_d10v_run_OBJECTS) @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_DEPENDENCIES = d10v/nrun.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a $(am__DEPENDENCIES_4) am_erc32_run_OBJECTS = erc32_run_OBJECTS = $(am_erc32_run_OBJECTS) @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_DEPENDENCIES = erc32/sis.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_4) \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_1) \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(am__DEPENDENCIES_1) erc32_sis_SOURCES = erc32/sis.c erc32_sis_OBJECTS = erc32/sis.$(OBJEXT) erc32_sis_LDADD = $(LDADD) am_example_synacor_run_OBJECTS = example_synacor_run_OBJECTS = $(am_example_synacor_run_OBJECTS) @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_DEPENDENCIES = \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \ @SIM_ENABLE_ARCH_examples_TRUE@ $(am__DEPENDENCIES_4) am_frv_run_OBJECTS = frv_run_OBJECTS = $(am_frv_run_OBJECTS) @SIM_ENABLE_ARCH_frv_TRUE@frv_run_DEPENDENCIES = frv/nrun.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a $(am__DEPENDENCIES_4) am_ft32_run_OBJECTS = ft32_run_OBJECTS = $(am_ft32_run_OBJECTS) @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_DEPENDENCIES = ft32/nrun.o \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a $(am__DEPENDENCIES_4) am_h8300_run_OBJECTS = h8300_run_OBJECTS = $(am_h8300_run_OBJECTS) @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_DEPENDENCIES = h8300/nrun.o \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(am__DEPENDENCIES_4) am_igen_filter_OBJECTS = igen_filter_OBJECTS = $(am_igen_filter_OBJECTS) igen_filter_DEPENDENCIES = igen/filter-main.o igen/libigen.a am_igen_gen_OBJECTS = igen_gen_OBJECTS = $(am_igen_gen_OBJECTS) igen_gen_DEPENDENCIES = igen/gen-main.o igen/libigen.a am_igen_igen_OBJECTS = igen/igen.$(OBJEXT) igen_igen_OBJECTS = $(am_igen_igen_OBJECTS) igen_igen_DEPENDENCIES = igen/libigen.a am_igen_ld_cache_OBJECTS = igen_ld_cache_OBJECTS = $(am_igen_ld_cache_OBJECTS) igen_ld_cache_DEPENDENCIES = igen/ld-cache-main.o igen/libigen.a am_igen_ld_decode_OBJECTS = igen_ld_decode_OBJECTS = $(am_igen_ld_decode_OBJECTS) igen_ld_decode_DEPENDENCIES = igen/ld-decode-main.o igen/libigen.a am_igen_ld_insn_OBJECTS = igen_ld_insn_OBJECTS = $(am_igen_ld_insn_OBJECTS) igen_ld_insn_DEPENDENCIES = igen/ld-insn-main.o igen/libigen.a am_igen_table_OBJECTS = igen_table_OBJECTS = $(am_igen_table_OBJECTS) igen_table_DEPENDENCIES = igen/table-main.o igen/libigen.a am_iq2000_run_OBJECTS = iq2000_run_OBJECTS = $(am_iq2000_run_OBJECTS) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_DEPENDENCIES = iq2000/nrun.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(am__DEPENDENCIES_4) am_lm32_run_OBJECTS = lm32_run_OBJECTS = $(am_lm32_run_OBJECTS) @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_DEPENDENCIES = lm32/nrun.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a $(am__DEPENDENCIES_4) @SIM_ENABLE_ARCH_m32c_TRUE@am_m32c_opc2c_OBJECTS = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c.$(OBJEXT) m32c_opc2c_OBJECTS = $(am_m32c_opc2c_OBJECTS) m32c_opc2c_LDADD = $(LDADD) am_m32c_run_OBJECTS = m32c_run_OBJECTS = $(am_m32c_run_OBJECTS) @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_DEPENDENCIES = m32c/main.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a $(am__DEPENDENCIES_4) am_m32r_run_OBJECTS = m32r_run_OBJECTS = $(am_m32r_run_OBJECTS) @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_DEPENDENCIES = m32r/nrun.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a $(am__DEPENDENCIES_4) @SIM_ENABLE_ARCH_m68hc11_TRUE@am_m68hc11_gencode_OBJECTS = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode.$(OBJEXT) m68hc11_gencode_OBJECTS = $(am_m68hc11_gencode_OBJECTS) m68hc11_gencode_LDADD = $(LDADD) am_m68hc11_run_OBJECTS = m68hc11_run_OBJECTS = $(am_m68hc11_run_OBJECTS) @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_DEPENDENCIES = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o m68hc11/libsim.a \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(am__DEPENDENCIES_4) am_mcore_run_OBJECTS = mcore_run_OBJECTS = $(am_mcore_run_OBJECTS) @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_DEPENDENCIES = mcore/nrun.o \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(am__DEPENDENCIES_4) am_microblaze_run_OBJECTS = microblaze_run_OBJECTS = $(am_microblaze_run_OBJECTS) @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_DEPENDENCIES = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(am__DEPENDENCIES_4) am_mips_run_OBJECTS = mips_run_OBJECTS = $(am_mips_run_OBJECTS) @SIM_ENABLE_ARCH_mips_TRUE@mips_run_DEPENDENCIES = mips/nrun.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a $(am__DEPENDENCIES_4) am_mn10300_run_OBJECTS = mn10300_run_OBJECTS = $(am_mn10300_run_OBJECTS) @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_DEPENDENCIES = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o mn10300/libsim.a \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(am__DEPENDENCIES_4) am_moxie_run_OBJECTS = moxie_run_OBJECTS = $(am_moxie_run_OBJECTS) @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_DEPENDENCIES = moxie/nrun.o \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(am__DEPENDENCIES_4) am_msp430_run_OBJECTS = msp430_run_OBJECTS = $(am_msp430_run_OBJECTS) @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_DEPENDENCIES = msp430/nrun.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(am__DEPENDENCIES_4) am_or1k_run_OBJECTS = or1k_run_OBJECTS = $(am_or1k_run_OBJECTS) @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_DEPENDENCIES = or1k/nrun.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a $(am__DEPENDENCIES_4) am_ppc_run_OBJECTS = ppc_run_OBJECTS = $(am_ppc_run_OBJECTS) @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_DEPENDENCIES = ppc/main.o \ @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a $(am__DEPENDENCIES_4) am_pru_run_OBJECTS = pru_run_OBJECTS = $(am_pru_run_OBJECTS) @SIM_ENABLE_ARCH_pru_TRUE@pru_run_DEPENDENCIES = pru/nrun.o \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a $(am__DEPENDENCIES_4) am_riscv_run_OBJECTS = riscv_run_OBJECTS = $(am_riscv_run_OBJECTS) @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_DEPENDENCIES = riscv/nrun.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(am__DEPENDENCIES_4) am_rl78_run_OBJECTS = rl78_run_OBJECTS = $(am_rl78_run_OBJECTS) @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_DEPENDENCIES = rl78/main.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a $(am__DEPENDENCIES_4) am_rx_run_OBJECTS = rx_run_OBJECTS = $(am_rx_run_OBJECTS) @SIM_ENABLE_ARCH_rx_TRUE@rx_run_DEPENDENCIES = rx/main.o rx/libsim.a \ @SIM_ENABLE_ARCH_rx_TRUE@ $(am__DEPENDENCIES_4) @SIM_ENABLE_ARCH_sh_TRUE@am_sh_gencode_OBJECTS = sh/gencode.$(OBJEXT) sh_gencode_OBJECTS = $(am_sh_gencode_OBJECTS) sh_gencode_LDADD = $(LDADD) am_sh_run_OBJECTS = sh_run_OBJECTS = $(am_sh_run_OBJECTS) @SIM_ENABLE_ARCH_sh_TRUE@sh_run_DEPENDENCIES = sh/nrun.o sh/libsim.a \ @SIM_ENABLE_ARCH_sh_TRUE@ $(am__DEPENDENCIES_4) testsuite_common_alu_tst_SOURCES = testsuite/common/alu-tst.c testsuite_common_alu_tst_OBJECTS = testsuite/common/alu-tst.$(OBJEXT) testsuite_common_alu_tst_LDADD = $(LDADD) testsuite_common_bits_gen_SOURCES = testsuite/common/bits-gen.c testsuite_common_bits_gen_OBJECTS = \ testsuite/common/bits-gen.$(OBJEXT) testsuite_common_bits_gen_LDADD = $(LDADD) testsuite_common_bits32m0_SOURCES = testsuite/common/bits32m0.c testsuite_common_bits32m0_OBJECTS = \ testsuite/common/bits32m0.$(OBJEXT) testsuite_common_bits32m0_LDADD = $(LDADD) testsuite_common_bits32m31_SOURCES = testsuite/common/bits32m31.c testsuite_common_bits32m31_OBJECTS = \ testsuite/common/bits32m31.$(OBJEXT) testsuite_common_bits32m31_LDADD = $(LDADD) testsuite_common_bits64m0_SOURCES = testsuite/common/bits64m0.c testsuite_common_bits64m0_OBJECTS = \ testsuite/common/bits64m0.$(OBJEXT) testsuite_common_bits64m0_LDADD = $(LDADD) testsuite_common_bits64m63_SOURCES = testsuite/common/bits64m63.c testsuite_common_bits64m63_OBJECTS = \ testsuite/common/bits64m63.$(OBJEXT) testsuite_common_bits64m63_LDADD = $(LDADD) testsuite_common_fpu_tst_SOURCES = testsuite/common/fpu-tst.c testsuite_common_fpu_tst_OBJECTS = testsuite/common/fpu-tst.$(OBJEXT) testsuite_common_fpu_tst_LDADD = $(LDADD) am_v850_run_OBJECTS = v850_run_OBJECTS = $(am_v850_run_OBJECTS) @SIM_ENABLE_ARCH_v850_TRUE@v850_run_DEPENDENCIES = v850/nrun.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a $(am__DEPENDENCIES_4) AM_V_P = $(am__v_P_@AM_V@) am__v_P_ = $(am__v_P_@AM_DEFAULT_V@) am__v_P_0 = false am__v_P_1 = : AM_V_GEN = $(am__v_GEN_@AM_V@) am__v_GEN_ = $(am__v_GEN_@AM_DEFAULT_V@) am__v_GEN_0 = @echo " GEN " $@; am__v_GEN_1 = AM_V_at = $(am__v_at_@AM_V@) am__v_at_ = $(am__v_at_@AM_DEFAULT_V@) am__v_at_0 = @ am__v_at_1 = DEFAULT_INCLUDES = -I.@am__isrc@ depcomp = $(SHELL) $(top_srcdir)/../depcomp am__depfiles_maybe = depfiles am__mv = mv -f COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) LTCOMPILE = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \ $(LIBTOOLFLAGS) --mode=compile $(CC) $(DEFS) \ $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \ $(AM_CFLAGS) $(CFLAGS) AM_V_CC = $(am__v_CC_@AM_V@) am__v_CC_ = $(am__v_CC_@AM_DEFAULT_V@) am__v_CC_0 = @echo " CC " $@; am__v_CC_1 = CCLD = $(CC) LINK = $(LIBTOOL) $(AM_V_lt) --tag=CC $(AM_LIBTOOLFLAGS) \ $(LIBTOOLFLAGS) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ $(AM_LDFLAGS) $(LDFLAGS) -o $@ AM_V_CCLD = $(am__v_CCLD_@AM_V@) am__v_CCLD_ = $(am__v_CCLD_@AM_DEFAULT_V@) am__v_CCLD_0 = @echo " CCLD " $@; am__v_CCLD_1 = SOURCES = $(aarch64_libsim_a_SOURCES) \ $(nodist_aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \ $(nodist_arm_libsim_a_SOURCES) $(avr_libsim_a_SOURCES) \ $(nodist_avr_libsim_a_SOURCES) $(bfin_libsim_a_SOURCES) \ $(nodist_bfin_libsim_a_SOURCES) $(bpf_libsim_a_SOURCES) \ $(nodist_bpf_libsim_a_SOURCES) $(common_libcommon_a_SOURCES) \ $(cr16_libsim_a_SOURCES) $(nodist_cr16_libsim_a_SOURCES) \ $(cris_libsim_a_SOURCES) $(nodist_cris_libsim_a_SOURCES) \ $(d10v_libsim_a_SOURCES) $(nodist_d10v_libsim_a_SOURCES) \ $(erc32_libsim_a_SOURCES) $(nodist_erc32_libsim_a_SOURCES) \ $(example_synacor_libsim_a_SOURCES) \ $(nodist_example_synacor_libsim_a_SOURCES) \ $(frv_libsim_a_SOURCES) $(nodist_frv_libsim_a_SOURCES) \ $(ft32_libsim_a_SOURCES) $(nodist_ft32_libsim_a_SOURCES) \ $(h8300_libsim_a_SOURCES) $(nodist_h8300_libsim_a_SOURCES) \ $(igen_libigen_a_SOURCES) $(iq2000_libsim_a_SOURCES) \ $(nodist_iq2000_libsim_a_SOURCES) $(lm32_libsim_a_SOURCES) \ $(nodist_lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \ $(nodist_m32c_libsim_a_SOURCES) $(m32r_libsim_a_SOURCES) \ $(nodist_m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \ $(nodist_m68hc11_libsim_a_SOURCES) $(mcore_libsim_a_SOURCES) \ $(nodist_mcore_libsim_a_SOURCES) \ $(microblaze_libsim_a_SOURCES) \ $(nodist_microblaze_libsim_a_SOURCES) $(mips_libsim_a_SOURCES) \ $(nodist_mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \ $(nodist_mn10300_libsim_a_SOURCES) $(moxie_libsim_a_SOURCES) \ $(nodist_moxie_libsim_a_SOURCES) $(msp430_libsim_a_SOURCES) \ $(nodist_msp430_libsim_a_SOURCES) $(or1k_libsim_a_SOURCES) \ $(nodist_or1k_libsim_a_SOURCES) $(pru_libsim_a_SOURCES) \ $(nodist_pru_libsim_a_SOURCES) $(riscv_libsim_a_SOURCES) \ $(nodist_riscv_libsim_a_SOURCES) $(rl78_libsim_a_SOURCES) \ $(nodist_rl78_libsim_a_SOURCES) $(rx_libsim_a_SOURCES) \ $(nodist_rx_libsim_a_SOURCES) $(sh_libsim_a_SOURCES) \ $(nodist_sh_libsim_a_SOURCES) $(v850_libsim_a_SOURCES) \ $(nodist_v850_libsim_a_SOURCES) $(aarch64_run_SOURCES) \ $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \ $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \ $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \ $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \ $(erc32_run_SOURCES) erc32/sis.c \ $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \ $(ft32_run_SOURCES) $(h8300_run_SOURCES) \ $(igen_filter_SOURCES) $(igen_gen_SOURCES) \ $(igen_igen_SOURCES) $(igen_ld_cache_SOURCES) \ $(igen_ld_decode_SOURCES) $(igen_ld_insn_SOURCES) \ $(igen_table_SOURCES) $(iq2000_run_SOURCES) \ $(lm32_run_SOURCES) $(m32c_opc2c_SOURCES) $(m32c_run_SOURCES) \ $(m32r_run_SOURCES) $(m68hc11_gencode_SOURCES) \ $(m68hc11_run_SOURCES) $(mcore_run_SOURCES) \ $(microblaze_run_SOURCES) $(mips_run_SOURCES) \ $(mn10300_run_SOURCES) $(moxie_run_SOURCES) \ $(msp430_run_SOURCES) $(or1k_run_SOURCES) $(ppc_run_SOURCES) \ $(pru_run_SOURCES) $(riscv_run_SOURCES) $(rl78_run_SOURCES) \ $(rx_run_SOURCES) $(sh_gencode_SOURCES) $(sh_run_SOURCES) \ testsuite/common/alu-tst.c testsuite/common/bits-gen.c \ testsuite/common/bits32m0.c testsuite/common/bits32m31.c \ testsuite/common/bits64m0.c testsuite/common/bits64m63.c \ testsuite/common/fpu-tst.c $(v850_run_SOURCES) RECURSIVE_TARGETS = all-recursive check-recursive cscopelist-recursive \ ctags-recursive dvi-recursive html-recursive info-recursive \ install-data-recursive install-dvi-recursive \ install-exec-recursive install-html-recursive \ install-info-recursive install-pdf-recursive \ install-ps-recursive install-recursive installcheck-recursive \ installdirs-recursive pdf-recursive ps-recursive \ tags-recursive uninstall-recursive am__can_run_installinfo = \ case $$AM_UPDATE_INFO_DIR in \ n|no|NO) false;; \ *) (install-info --version) >/dev/null 2>&1;; \ esac am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; am__vpath_adj = case $$p in \ $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \ *) f=$$p;; \ esac; am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`; am__install_max = 40 am__nobase_strip_setup = \ srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'` am__nobase_strip = \ for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||" am__nobase_list = $(am__nobase_strip_setup); \ for p in $$list; do echo "$$p $$p"; done | \ sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \ $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \ if (++n[$$2] == $(am__install_max)) \ { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \ END { for (dir in files) print dir, files[dir] }' am__base_list = \ sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \ sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g' am__uninstall_files_from_dir = { \ test -z "$$files" \ || { test ! -d "$$dir" && test ! -f "$$dir" && test ! -r "$$dir"; } \ || { echo " ( cd '$$dir' && rm -f" $$files ")"; \ $(am__cd) "$$dir" && rm -f $$files; }; \ } am__installdirs = "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" \ "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" \ "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" \ "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)" DATA = $(armdoc_DATA) $(dtb_DATA) $(erc32doc_DATA) $(frvdoc_DATA) \ $(or1kdoc_DATA) $(ppcdoc_DATA) $(rxdoc_DATA) am__pkginclude_HEADERS_DIST = $(srcroot)/include/sim/callback.h \ $(srcroot)/include/sim/sim.h HEADERS = $(pkginclude_HEADERS) RECURSIVE_CLEAN_TARGETS = mostlyclean-recursive clean-recursive \ distclean-recursive maintainer-clean-recursive am__recursive_targets = \ $(RECURSIVE_TARGETS) \ $(RECURSIVE_CLEAN_TARGETS) \ $(am__extra_recursive_targets) AM_RECURSIVE_TARGETS = $(am__recursive_targets:-recursive=) TAGS CTAGS \ cscope check recheck am__tagged_files = $(HEADERS) $(SOURCES) $(TAGS_FILES) \ $(LISP)config.h.in # Read a list of newline-separated strings from the standard input, # and print each of them once, without duplicates. Input order is # *not* preserved. am__uniquify_input = $(AWK) '\ BEGIN { nonempty = 0; } \ { items[$$0] = 1; nonempty = 1; } \ END { if (nonempty) { for (i in items) print i; }; } \ ' # Make sure the list of sources is unique. This is necessary because, # e.g., the same source file might be shared among _SOURCES variables # for different programs/libraries. am__define_uniq_tagged_files = \ list='$(am__tagged_files)'; \ unique=`for i in $$list; do \ if test -f "$$i"; then echo $$i; else echo $(srcdir)/$$i; fi; \ done | $(am__uniquify_input)` ETAGS = etags CTAGS = ctags CSCOPE = cscope DEJATOOL = $(PACKAGE) RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir EXPECT = expect RUNTEST = runtest am__tty_colors_dummy = \ mgn= red= grn= lgn= blu= brg= std=; \ am__color_tests=no am__tty_colors = { \ $(am__tty_colors_dummy); \ if test "X$(AM_COLOR_TESTS)" = Xno; then \ am__color_tests=no; \ elif test "X$(AM_COLOR_TESTS)" = Xalways; then \ am__color_tests=yes; \ elif test "X$$TERM" != Xdumb && { test -t 1; } 2>/dev/null; then \ am__color_tests=yes; \ fi; \ if test $$am__color_tests = yes; then \ red=''; \ grn=''; \ lgn=''; \ blu=''; \ mgn=''; \ brg=''; \ std=''; \ fi; \ } am__recheck_rx = ^[ ]*:recheck:[ ]* am__global_test_result_rx = ^[ ]*:global-test-result:[ ]* am__copy_in_global_log_rx = ^[ ]*:copy-in-global-log:[ ]* # A command that, given a newline-separated list of test names on the # standard input, print the name of the tests that are to be re-run # upon "make recheck". am__list_recheck_tests = $(AWK) '{ \ recheck = 1; \ while ((rc = (getline line < ($$0 ".trs"))) != 0) \ { \ if (rc < 0) \ { \ if ((getline line2 < ($$0 ".log")) < 0) \ recheck = 0; \ break; \ } \ else if (line ~ /$(am__recheck_rx)[nN][Oo]/) \ { \ recheck = 0; \ break; \ } \ else if (line ~ /$(am__recheck_rx)[yY][eE][sS]/) \ { \ break; \ } \ }; \ if (recheck) \ print $$0; \ close ($$0 ".trs"); \ close ($$0 ".log"); \ }' # A command that, given a newline-separated list of test names on the # standard input, create the global log from their .trs and .log files. am__create_global_log = $(AWK) ' \ function fatal(msg) \ { \ print "fatal: making $@: " msg | "cat >&2"; \ exit 1; \ } \ function rst_section(header) \ { \ print header; \ len = length(header); \ for (i = 1; i <= len; i = i + 1) \ printf "="; \ printf "\n\n"; \ } \ { \ copy_in_global_log = 1; \ global_test_result = "RUN"; \ while ((rc = (getline line < ($$0 ".trs"))) != 0) \ { \ if (rc < 0) \ fatal("failed to read from " $$0 ".trs"); \ if (line ~ /$(am__global_test_result_rx)/) \ { \ sub("$(am__global_test_result_rx)", "", line); \ sub("[ ]*$$", "", line); \ global_test_result = line; \ } \ else if (line ~ /$(am__copy_in_global_log_rx)[nN][oO]/) \ copy_in_global_log = 0; \ }; \ if (copy_in_global_log) \ { \ rst_section(global_test_result ": " $$0); \ while ((rc = (getline line < ($$0 ".log"))) != 0) \ { \ if (rc < 0) \ fatal("failed to read from " $$0 ".log"); \ print line; \ }; \ printf "\n"; \ }; \ close ($$0 ".trs"); \ close ($$0 ".log"); \ }' # Restructured Text title. am__rst_title = { sed 's/.*/ & /;h;s/./=/g;p;x;s/ *$$//;p;g' && echo; } # Solaris 10 'make', and several other traditional 'make' implementations, # pass "-e" to $(SHELL), and POSIX 2008 even requires this. Work around it # by disabling -e (using the XSI extension "set +e") if it's set. am__sh_e_setup = case $$- in *e*) set +e;; esac # Default flags passed to test drivers. am__common_driver_flags = \ --color-tests "$$am__color_tests" \ --enable-hard-errors "$$am__enable_hard_errors" \ --expect-failure "$$am__expect_failure" # To be inserted before the command running the test. Creates the # directory for the log if needed. Stores in $dir the directory # containing $f, in $tst the test, in $log the log. Executes the # developer- defined test setup AM_TESTS_ENVIRONMENT (if any), and # passes TESTS_ENVIRONMENT. Set up options for the wrapper that # will run the test scripts (or their associated LOG_COMPILER, if # thy have one). am__check_pre = \ $(am__sh_e_setup); \ $(am__vpath_adj_setup) $(am__vpath_adj) \ $(am__tty_colors); \ srcdir=$(srcdir); export srcdir; \ case "$@" in \ */*) am__odir=`echo "./$@" | sed 's|/[^/]*$$||'`;; \ *) am__odir=.;; \ esac; \ test "x$$am__odir" = x"." || test -d "$$am__odir" \ || $(MKDIR_P) "$$am__odir" || exit $$?; \ if test -f "./$$f"; then dir=./; \ elif test -f "$$f"; then dir=; \ else dir="$(srcdir)/"; fi; \ tst=$$dir$$f; log='$@'; \ if test -n '$(DISABLE_HARD_ERRORS)'; then \ am__enable_hard_errors=no; \ else \ am__enable_hard_errors=yes; \ fi; \ case " $(XFAIL_TESTS) " in \ *[\ \ ]$$f[\ \ ]* | *[\ \ ]$$dir$$f[\ \ ]*) \ am__expect_failure=yes;; \ *) \ am__expect_failure=no;; \ esac; \ $(AM_TESTS_ENVIRONMENT) $(TESTS_ENVIRONMENT) # A shell command to get the names of the tests scripts with any registered # extension removed (i.e., equivalently, the names of the test logs, with # the '.log' extension removed). The result is saved in the shell variable # '$bases'. This honors runtime overriding of TESTS and TEST_LOGS. Sadly, # we cannot use something simpler, involving e.g., "$(TEST_LOGS:.log=)", # since that might cause problem with VPATH rewrites for suffix-less tests. # See also 'test-harness-vpath-rewrite.sh' and 'test-trs-basic.sh'. am__set_TESTS_bases = \ bases='$(TEST_LOGS)'; \ bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \ bases=`echo $$bases` RECHECK_LOGS = $(TEST_LOGS) TEST_SUITE_LOG = test-suite.log TEST_EXTENSIONS = @EXEEXT@ .test LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver LOG_COMPILE = $(LOG_COMPILER) $(AM_LOG_FLAGS) $(LOG_FLAGS) am__set_b = \ case '$@' in \ */*) \ case '$*' in \ */*) b='$*';; \ *) b=`echo '$@' | sed 's/\.log$$//'`; \ esac;; \ *) \ b='$*';; \ esac am__test_logs1 = $(TESTS:=.log) am__test_logs2 = $(am__test_logs1:@EXEEXT@.log=.log) TEST_LOGS = $(am__test_logs2:.test.log=.log) TEST_LOG_DRIVER = $(SHELL) $(top_srcdir)/../test-driver TEST_LOG_COMPILE = $(TEST_LOG_COMPILER) $(AM_TEST_LOG_FLAGS) \ $(TEST_LOG_FLAGS) DIST_SUBDIRS = $(SUBDIRS) ACLOCAL = @ACLOCAL@ AMTAR = @AMTAR@ AM_DEFAULT_VERBOSITY = @AM_DEFAULT_VERBOSITY@ AR = @AR@ AR_FOR_BUILD = @AR_FOR_BUILD@ AS_FOR_TARGET = @AS_FOR_TARGET@ AS_FOR_TARGET_AARCH64 = @AS_FOR_TARGET_AARCH64@ AS_FOR_TARGET_ARM = @AS_FOR_TARGET_ARM@ AS_FOR_TARGET_AVR = @AS_FOR_TARGET_AVR@ AS_FOR_TARGET_BFIN = @AS_FOR_TARGET_BFIN@ AS_FOR_TARGET_BPF = @AS_FOR_TARGET_BPF@ AS_FOR_TARGET_CR16 = @AS_FOR_TARGET_CR16@ AS_FOR_TARGET_CRIS = @AS_FOR_TARGET_CRIS@ AS_FOR_TARGET_D10V = @AS_FOR_TARGET_D10V@ AS_FOR_TARGET_ERC32 = @AS_FOR_TARGET_ERC32@ AS_FOR_TARGET_EXAMPLE_SYNACOR = @AS_FOR_TARGET_EXAMPLE_SYNACOR@ AS_FOR_TARGET_FRV = @AS_FOR_TARGET_FRV@ AS_FOR_TARGET_FT32 = @AS_FOR_TARGET_FT32@ AS_FOR_TARGET_H8300 = @AS_FOR_TARGET_H8300@ AS_FOR_TARGET_IQ2000 = @AS_FOR_TARGET_IQ2000@ AS_FOR_TARGET_LM32 = @AS_FOR_TARGET_LM32@ AS_FOR_TARGET_M32C = @AS_FOR_TARGET_M32C@ AS_FOR_TARGET_M32R = @AS_FOR_TARGET_M32R@ AS_FOR_TARGET_M68HC11 = @AS_FOR_TARGET_M68HC11@ AS_FOR_TARGET_MCORE = @AS_FOR_TARGET_MCORE@ AS_FOR_TARGET_MICROBLAZE = @AS_FOR_TARGET_MICROBLAZE@ AS_FOR_TARGET_MIPS = @AS_FOR_TARGET_MIPS@ AS_FOR_TARGET_MN10300 = @AS_FOR_TARGET_MN10300@ AS_FOR_TARGET_MOXIE = @AS_FOR_TARGET_MOXIE@ AS_FOR_TARGET_MSP430 = @AS_FOR_TARGET_MSP430@ AS_FOR_TARGET_OR1K = @AS_FOR_TARGET_OR1K@ AS_FOR_TARGET_PPC = @AS_FOR_TARGET_PPC@ AS_FOR_TARGET_PRU = @AS_FOR_TARGET_PRU@ AS_FOR_TARGET_RISCV = @AS_FOR_TARGET_RISCV@ AS_FOR_TARGET_RL78 = @AS_FOR_TARGET_RL78@ AS_FOR_TARGET_RX = @AS_FOR_TARGET_RX@ AS_FOR_TARGET_SH = @AS_FOR_TARGET_SH@ AS_FOR_TARGET_V850 = @AS_FOR_TARGET_V850@ AUTOCONF = @AUTOCONF@ AUTOHEADER = @AUTOHEADER@ AUTOMAKE = @AUTOMAKE@ AWK = @AWK@ CC = @CC@ CCDEPMODE = @CCDEPMODE@ CC_FOR_BUILD = @CC_FOR_BUILD@ CC_FOR_TARGET = @CC_FOR_TARGET@ CC_FOR_TARGET_AARCH64 = @CC_FOR_TARGET_AARCH64@ CC_FOR_TARGET_ARM = @CC_FOR_TARGET_ARM@ CC_FOR_TARGET_AVR = @CC_FOR_TARGET_AVR@ CC_FOR_TARGET_BFIN = @CC_FOR_TARGET_BFIN@ CC_FOR_TARGET_BPF = @CC_FOR_TARGET_BPF@ CC_FOR_TARGET_CR16 = @CC_FOR_TARGET_CR16@ CC_FOR_TARGET_CRIS = @CC_FOR_TARGET_CRIS@ CC_FOR_TARGET_D10V = @CC_FOR_TARGET_D10V@ CC_FOR_TARGET_ERC32 = @CC_FOR_TARGET_ERC32@ CC_FOR_TARGET_EXAMPLE_SYNACOR = @CC_FOR_TARGET_EXAMPLE_SYNACOR@ CC_FOR_TARGET_FRV = @CC_FOR_TARGET_FRV@ CC_FOR_TARGET_FT32 = @CC_FOR_TARGET_FT32@ CC_FOR_TARGET_H8300 = @CC_FOR_TARGET_H8300@ CC_FOR_TARGET_IQ2000 = @CC_FOR_TARGET_IQ2000@ CC_FOR_TARGET_LM32 = @CC_FOR_TARGET_LM32@ CC_FOR_TARGET_M32C = @CC_FOR_TARGET_M32C@ CC_FOR_TARGET_M32R = @CC_FOR_TARGET_M32R@ CC_FOR_TARGET_M68HC11 = @CC_FOR_TARGET_M68HC11@ CC_FOR_TARGET_MCORE = @CC_FOR_TARGET_MCORE@ CC_FOR_TARGET_MICROBLAZE = @CC_FOR_TARGET_MICROBLAZE@ CC_FOR_TARGET_MIPS = @CC_FOR_TARGET_MIPS@ CC_FOR_TARGET_MN10300 = @CC_FOR_TARGET_MN10300@ CC_FOR_TARGET_MOXIE = @CC_FOR_TARGET_MOXIE@ CC_FOR_TARGET_MSP430 = @CC_FOR_TARGET_MSP430@ CC_FOR_TARGET_OR1K = @CC_FOR_TARGET_OR1K@ CC_FOR_TARGET_PPC = @CC_FOR_TARGET_PPC@ CC_FOR_TARGET_PRU = @CC_FOR_TARGET_PRU@ CC_FOR_TARGET_RISCV = @CC_FOR_TARGET_RISCV@ CC_FOR_TARGET_RL78 = @CC_FOR_TARGET_RL78@ CC_FOR_TARGET_RX = @CC_FOR_TARGET_RX@ CC_FOR_TARGET_SH = @CC_FOR_TARGET_SH@ CC_FOR_TARGET_V850 = @CC_FOR_TARGET_V850@ CFLAGS = @CFLAGS@ CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@ CGEN_MAINT = @CGEN_MAINT@ CPP = @CPP@ CPPFLAGS = @CPPFLAGS@ CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@ CYGPATH_W = @CYGPATH_W@ C_DIALECT = @C_DIALECT@ DEFS = @DEFS@ DEPDIR = @DEPDIR@ DSYMUTIL = @DSYMUTIL@ DTC = @DTC@ DUMPBIN = @DUMPBIN@ ECHO_C = @ECHO_C@ ECHO_N = @ECHO_N@ ECHO_T = @ECHO_T@ EGREP = @EGREP@ EXEEXT = @EXEEXT@ FGREP = @FGREP@ GREP = @GREP@ IGEN_FLAGS_SMP = @IGEN_FLAGS_SMP@ INSTALL = @INSTALL@ INSTALL_DATA = @INSTALL_DATA@ INSTALL_PROGRAM = @INSTALL_PROGRAM@ INSTALL_SCRIPT = @INSTALL_SCRIPT@ INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ LD = @LD@ LDFLAGS = @LDFLAGS@ LDFLAGS_FOR_BUILD = @LDFLAGS_FOR_BUILD@ LD_FOR_TARGET = @LD_FOR_TARGET@ LD_FOR_TARGET_AARCH64 = @LD_FOR_TARGET_AARCH64@ LD_FOR_TARGET_ARM = @LD_FOR_TARGET_ARM@ LD_FOR_TARGET_AVR = @LD_FOR_TARGET_AVR@ LD_FOR_TARGET_BFIN = @LD_FOR_TARGET_BFIN@ LD_FOR_TARGET_BPF = @LD_FOR_TARGET_BPF@ LD_FOR_TARGET_CR16 = @LD_FOR_TARGET_CR16@ LD_FOR_TARGET_CRIS = @LD_FOR_TARGET_CRIS@ LD_FOR_TARGET_D10V = @LD_FOR_TARGET_D10V@ LD_FOR_TARGET_ERC32 = @LD_FOR_TARGET_ERC32@ LD_FOR_TARGET_EXAMPLE_SYNACOR = @LD_FOR_TARGET_EXAMPLE_SYNACOR@ LD_FOR_TARGET_FRV = @LD_FOR_TARGET_FRV@ LD_FOR_TARGET_FT32 = @LD_FOR_TARGET_FT32@ LD_FOR_TARGET_H8300 = @LD_FOR_TARGET_H8300@ LD_FOR_TARGET_IQ2000 = @LD_FOR_TARGET_IQ2000@ LD_FOR_TARGET_LM32 = @LD_FOR_TARGET_LM32@ LD_FOR_TARGET_M32C = @LD_FOR_TARGET_M32C@ LD_FOR_TARGET_M32R = @LD_FOR_TARGET_M32R@ LD_FOR_TARGET_M68HC11 = @LD_FOR_TARGET_M68HC11@ LD_FOR_TARGET_MCORE = @LD_FOR_TARGET_MCORE@ LD_FOR_TARGET_MICROBLAZE = @LD_FOR_TARGET_MICROBLAZE@ LD_FOR_TARGET_MIPS = @LD_FOR_TARGET_MIPS@ LD_FOR_TARGET_MN10300 = @LD_FOR_TARGET_MN10300@ LD_FOR_TARGET_MOXIE = @LD_FOR_TARGET_MOXIE@ LD_FOR_TARGET_MSP430 = @LD_FOR_TARGET_MSP430@ LD_FOR_TARGET_OR1K = @LD_FOR_TARGET_OR1K@ LD_FOR_TARGET_PPC = @LD_FOR_TARGET_PPC@ LD_FOR_TARGET_PRU = @LD_FOR_TARGET_PRU@ LD_FOR_TARGET_RISCV = @LD_FOR_TARGET_RISCV@ LD_FOR_TARGET_RL78 = @LD_FOR_TARGET_RL78@ LD_FOR_TARGET_RX = @LD_FOR_TARGET_RX@ LD_FOR_TARGET_SH = @LD_FOR_TARGET_SH@ LD_FOR_TARGET_V850 = @LD_FOR_TARGET_V850@ LIBOBJS = @LIBOBJS@ LIBS = @LIBS@ LIBTOOL = @LIBTOOL@ LIPO = @LIPO@ LN_S = @LN_S@ LTLIBOBJS = @LTLIBOBJS@ MAINT = @MAINT@ MAKEINFO = @MAKEINFO@ MKDIR_P = @MKDIR_P@ NM = @NM@ NMEDIT = @NMEDIT@ OBJDUMP = @OBJDUMP@ OBJEXT = @OBJEXT@ OTOOL = @OTOOL@ OTOOL64 = @OTOOL64@ PACKAGE = @PACKAGE@ PACKAGE_BUGREPORT = @PACKAGE_BUGREPORT@ PACKAGE_NAME = @PACKAGE_NAME@ PACKAGE_STRING = @PACKAGE_STRING@ PACKAGE_TARNAME = @PACKAGE_TARNAME@ PACKAGE_URL = @PACKAGE_URL@ PACKAGE_VERSION = @PACKAGE_VERSION@ PATH_SEPARATOR = @PATH_SEPARATOR@ PKGVERSION = @PKGVERSION@ PKG_CONFIG = @PKG_CONFIG@ PKG_CONFIG_LIBDIR = @PKG_CONFIG_LIBDIR@ PKG_CONFIG_PATH = @PKG_CONFIG_PATH@ RANLIB = @RANLIB@ RANLIB_FOR_BUILD = @RANLIB_FOR_BUILD@ READLINE_CFLAGS = @READLINE_CFLAGS@ READLINE_LIB = @READLINE_LIB@ REPORT_BUGS_TEXI = @REPORT_BUGS_TEXI@ REPORT_BUGS_TO = @REPORT_BUGS_TO@ SDL_CFLAGS = @SDL_CFLAGS@ SDL_LIBS = @SDL_LIBS@ SED = @SED@ SET_MAKE = @SET_MAKE@ SHELL = @SHELL@ SIM_ENABLED_ARCHES = @SIM_ENABLED_ARCHES@ SIM_FRV_TRAPDUMP_FLAGS = @SIM_FRV_TRAPDUMP_FLAGS@ SIM_HW_CFLAGS = @SIM_HW_CFLAGS@ SIM_HW_SOCKSER = @SIM_HW_SOCKSER@ SIM_INLINE = @SIM_INLINE@ SIM_MIPS_BITSIZE = @SIM_MIPS_BITSIZE@ SIM_MIPS_FPU_BITSIZE = @SIM_MIPS_FPU_BITSIZE@ SIM_MIPS_GEN = @SIM_MIPS_GEN@ SIM_MIPS_IGEN_ITABLE_FLAGS = @SIM_MIPS_IGEN_ITABLE_FLAGS@ SIM_MIPS_M16_FLAGS = @SIM_MIPS_M16_FLAGS@ SIM_MIPS_MULTI_IGEN_CONFIGS = @SIM_MIPS_MULTI_IGEN_CONFIGS@ SIM_MIPS_MULTI_OBJ = @SIM_MIPS_MULTI_OBJ@ SIM_MIPS_MULTI_SRC = @SIM_MIPS_MULTI_SRC@ SIM_MIPS_SINGLE_FLAGS = @SIM_MIPS_SINGLE_FLAGS@ SIM_MIPS_SUBTARGET = @SIM_MIPS_SUBTARGET@ SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@ SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@ SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@ SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@ STRIP = @STRIP@ TERMCAP_LIB = @TERMCAP_LIB@ VERSION = @VERSION@ WARN_CFLAGS = @WARN_CFLAGS@ WERROR_CFLAGS = @WERROR_CFLAGS@ abs_builddir = @abs_builddir@ abs_srcdir = @abs_srcdir@ abs_top_builddir = @abs_top_builddir@ abs_top_srcdir = @abs_top_srcdir@ ac_ct_CC = @ac_ct_CC@ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@ am__include = @am__include@ am__leading_dot = @am__leading_dot@ am__quote = @am__quote@ am__tar = @am__tar@ am__untar = @am__untar@ bindir = @bindir@ build = @build@ build_alias = @build_alias@ build_cpu = @build_cpu@ build_os = @build_os@ build_vendor = @build_vendor@ builddir = @builddir@ cgen = @cgen@ cgendir = @cgendir@ datadir = @datadir@ datarootdir = @datarootdir@ docdir = @docdir@ dvidir = @dvidir@ exec_prefix = @exec_prefix@ host = @host@ host_alias = @host_alias@ host_cpu = @host_cpu@ host_os = @host_os@ host_vendor = @host_vendor@ htmldir = @htmldir@ includedir = @includedir@ infodir = @infodir@ install_sh = @install_sh@ libdir = @libdir@ libexecdir = @libexecdir@ localedir = @localedir@ localstatedir = @localstatedir@ mandir = @mandir@ mkdir_p = @mkdir_p@ oldincludedir = @oldincludedir@ pdfdir = @pdfdir@ prefix = @prefix@ program_transform_name = @program_transform_name@ psdir = @psdir@ sbindir = @sbindir@ sharedstatedir = @sharedstatedir@ srcdir = @srcdir@ subdirs = @subdirs@ sysconfdir = @sysconfdir@ target = @target@ target_alias = @target_alias@ target_cpu = @target_cpu@ target_os = @target_os@ target_vendor = @target_vendor@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ AUTOMAKE_OPTIONS = dejagnu foreign no-dist subdir-objects ACLOCAL_AMFLAGS = -Im4 -I.. -I../config GNULIB_PARENT_DIR = .. srccom = $(srcdir)/common srcroot = $(srcdir)/.. SUBDIRS = @subdirs@ pkginclude_HEADERS = $(am__append_1) EXTRA_LIBRARIES = igen/libigen.a noinst_LIBRARIES = common/libcommon.a $(am__append_3) $(am__append_5) \ $(am__append_7) $(am__append_9) $(am__append_11) \ $(am__append_15) $(am__append_20) $(am__append_25) \ $(am__append_30) $(am__append_34) $(am__append_36) \ $(am__append_40) $(am__append_42) $(am__append_44) \ $(am__append_48) $(am__append_52) $(am__append_56) \ $(am__append_60) $(am__append_64) $(am__append_66) \ $(am__append_71) $(am__append_79) $(am__append_83) \ $(am__append_85) $(am__append_87) $(am__append_93) \ $(am__append_95) $(am__append_97) $(am__append_99) \ $(am__append_101) $(am__append_106) BUILT_SOURCES = $(am__append_13) $(am__append_17) $(am__append_23) \ $(am__append_27) $(am__append_38) $(am__append_46) \ $(am__append_50) $(am__append_58) $(am__append_73) \ $(am__append_81) $(am__append_89) $(am__append_103) \ $(am__append_108) CLEANFILES = common/version.c common/version.c-stamp \ testsuite/common/bits-gen testsuite/common/bits32m0.c \ testsuite/common/bits32m31.c testsuite/common/bits64m0.c \ testsuite/common/bits64m63.c DISTCLEANFILES = $(am__append_78) MOSTLYCLEANFILES = core $(SIM_ENABLED_ARCHES:%=%/*.o) \ $(SIM_ENABLED_ARCHES:%=%/hw-config.h) \ $(SIM_ENABLED_ARCHES:%=%/stamp-hw) \ $(SIM_ENABLED_ARCHES:%=%/modules.c) \ $(SIM_ENABLED_ARCHES:%=%/stamp-modules) $(igen_IGEN_TOOLS) \ site-sim-config.exp testrun.log testrun.sum $(am__append_14) \ $(am__append_19) $(am__append_24) $(am__append_29) \ $(am__append_39) $(am__append_47) $(am__append_51) \ $(am__append_55) $(am__append_59) $(am__append_63) \ $(am__append_77) $(am__append_82) $(am__append_90) \ $(am__append_105) $(am__append_109) AM_CFLAGS = \ $(WERROR_CFLAGS) \ $(WARN_CFLAGS) \ $(AM_CFLAGS_$(subst -,_,$(@D))) \ $(AM_CFLAGS_$(subst -,_,$(@D)_$(@F))) AM_CPPFLAGS = $(INCGNU) -I$(srcroot) -I$(srcroot)/include -I../bfd \ -I.. -I$(@D) -I$(srcdir)/$(@D) $(SIM_HW_CFLAGS) $(SIM_INLINE) \ $(AM_CPPFLAGS_$(subst -,_,$(@D))) $(AM_CPPFLAGS_$(subst \ -,_,$(@D)_$(@F))) -I$(srcdir)/common -DSIM_TOPDIR_BUILD AM_CPPFLAGS_FOR_BUILD = -I$(srcroot)/include $(SIM_HW_CFLAGS) \ $(SIM_INLINE) -I$(srcdir)/common COMPILE_FOR_BUILD = $(CC_FOR_BUILD) $(AM_CPPFLAGS_FOR_BUILD) $(CPPFLAGS_FOR_BUILD) $(CFLAGS_FOR_BUILD) LINK_FOR_BUILD = $(CC_FOR_BUILD) $(CFLAGS_FOR_BUILD) $(LDFLAGS_FOR_BUILD) -o $@ SIM_ALL_RECURSIVE_DEPS = $(am__append_91) SIM_INSTALL_DATA_LOCAL_DEPS = SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_32) SIM_UNINSTALL_LOCAL_DEPS = $(am__append_33) SIM_DEPBASE = $(@D)/$(DEPDIR)/$(@F:.o=) SIM_COMPILE = \ $(AM_V_CC)$(COMPILE) -MT $@ -MD -MP -MF $(SIM_DEPBASE).Tpo -c -o $@ $< && \ $(am__mv) $(SIM_DEPBASE).Tpo $(SIM_DEPBASE).Po AM_CPPFLAGS_common = -DSIM_COMMON_BUILD common_libcommon_a_SOURCES = \ common/callback.c \ common/portability.c \ common/sim-load.c \ common/sim-signal.c \ common/syscall.c \ common/target-newlib-errno.c \ common/target-newlib-open.c \ common/target-newlib-signal.c \ common/target-newlib-syscall.c \ common/version.c SIM_COMMON_HW_OBJS = \ hw-alloc.o \ hw-base.o \ hw-device.o \ hw-events.o \ hw-handles.o \ hw-instances.o \ hw-ports.o \ hw-properties.o \ hw-tree.o \ sim-hw.o SIM_NEW_COMMON_OBJS = sim-arange.o sim-bits.o sim-close.o \ sim-command.o sim-config.o sim-core.o sim-cpu.o sim-endian.o \ sim-engine.o sim-events.o sim-fpu.o sim-hload.o sim-hrw.o \ sim-io.o sim-info.o sim-memopt.o sim-model.o sim-module.o \ sim-options.o sim-profile.o sim-reason.o sim-reg.o sim-stop.o \ sim-syscall.o sim-trace.o sim-utils.o sim-watch.o \ $(am__append_2) SIM_HW_DEVICES = cfi core pal glue am_arch_d = $(subst -,_,$(@D)) GEN_MODULES_C_SRCS = \ $(wildcard \ $(patsubst %,$(srcdir)/%,$($(am_arch_d)_libsim_a_SOURCES)) \ $(patsubst %.o,$(srcdir)/%.c,$($(am_arch_d)_libsim_a_OBJECTS) $($(am_arch_d)_libsim_a_LIBADD)) \ $(filter-out %.o,$(patsubst $(@D)/%.o,$(srcdir)/common/%.c,$($(am_arch_d)_libsim_a_LIBADD)))) LIBIBERTY_LIB = ../libiberty/libiberty.a BFD_LIB = ../bfd/libbfd.la OPCODES_LIB = ../opcodes/libopcodes.la SIM_COMMON_LIBS = \ $(BFD_LIB) \ $(OPCODES_LIB) \ $(LIBIBERTY_LIB) \ $(LIBGNU) \ $(LIBGNU_EXTRA_LIBS) GUILE = $(or $(wildcard ../guile/libguile/guile),guile) CGEN = "$(GUILE) -l $(cgendir)/guile.scm -s" CGENFLAGS = -v CGEN_CPU_DIR = $(cgendir)/cpu CPU_DIR = $(srcroot)/cpu CGEN_ARCHFILE = $(CPU_DIR)/$(@D).cpu CGEN_READ_SCM = $(cgendir)/sim.scm CGEN_ARCH_SCM = $(cgendir)/sim-arch.scm CGEN_CPU_SCM = $(cgendir)/sim-cpu.scm $(cgendir)/sim-model.scm CGEN_DECODE_SCM = $(cgendir)/sim-decode.scm CGEN_DESC_SCM = $(cgendir)/desc.scm $(cgendir)/desc-cpu.scm CGEN_CPU_EXTR = /extr/ CGEN_CPU_READ = /read/ CGEN_CPU_WRITE = /write/ CGEN_CPU_SEM = /sem/ CGEN_CPU_SEMSW = /semsw/ CGEN_WRAPPER = $(srccom)/cgen.sh CGEN_GEN_ARCH = \ $(SHELL) $(CGEN_WRAPPER) arch $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" ignored "$$isa" $$mach ignored \ $(CGEN_ARCHFILE) ignored CGEN_GEN_CPU = \ $(SHELL) $(CGEN_WRAPPER) cpu $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \ $(CGEN_ARCHFILE) "$$EXTRAFILES" CGEN_GEN_DEFS = \ $(SHELL) $(CGEN_WRAPPER) defs $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \ $(CGEN_ARCHFILE) ignored CGEN_GEN_DECODE = \ $(SHELL) $(CGEN_WRAPPER) decode $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \ $(CGEN_ARCHFILE) "$$EXTRAFILES" CGEN_GEN_CPU_DECODE = \ $(SHELL) $(CGEN_WRAPPER) cpu-decode $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \ $(CGEN_ARCHFILE) "$$EXTRAFILES" CGEN_GEN_CPU_DESC = \ $(SHELL) $(CGEN_WRAPPER) desc $(srcdir)/$(@D) \ $(CGEN) $(cgendir) "$(CGENFLAGS)" \ $(@D) "$$FLAGS" $$cpu "$$isa" $$mach "$$SUFFIX" \ $(CGEN_ARCHFILE) ignored $$opcfile # igen leaks memory, and therefore makes AddressSanitizer unhappy. Disable # leak detection while running it. IGEN = igen/igen$(EXEEXT) IGEN_RUN = ASAN_OPTIONS=detect_leaks=0 $(IGEN) $(IGEN_FLAGS_SMP) igen_libigen_a_SOURCES = \ igen/table.c \ igen/lf.c \ igen/misc.c \ igen/filter_host.c \ igen/ld-decode.c \ igen/ld-cache.c \ igen/filter.c \ igen/ld-insn.c \ igen/gen-model.c \ igen/gen-itable.c \ igen/gen-icache.c \ igen/gen-semantics.c \ igen/gen-idecode.c \ igen/gen-support.c \ igen/gen-engine.c \ igen/gen.c igen_igen_SOURCES = igen/igen.c igen_igen_LDADD = igen/libigen.a igen_filter_SOURCES = igen_filter_LDADD = igen/filter-main.o igen/libigen.a igen_gen_SOURCES = igen_gen_LDADD = igen/gen-main.o igen/libigen.a igen_ld_cache_SOURCES = igen_ld_cache_LDADD = igen/ld-cache-main.o igen/libigen.a igen_ld_decode_SOURCES = igen_ld_decode_LDADD = igen/ld-decode-main.o igen/libigen.a igen_ld_insn_SOURCES = igen_ld_insn_LDADD = igen/ld-insn-main.o igen/libigen.a igen_table_SOURCES = igen_table_LDADD = igen/table-main.o igen/libigen.a igen_IGEN_TOOLS = \ $(IGEN) \ igen/filter \ igen/gen \ igen/ld-cache \ igen/ld-decode \ igen/ld-insn \ igen/table EXTRA_DEJAGNU_SITE_CONFIG = site-sim-config.exp # Custom verbose test variables that automake doesn't provide (yet?). AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@) AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@) AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*"; AM_V_RUNTEST_1 = DO_RUNTEST = \ LC_ALL=C; export LC_ALL; \ EXPECT=${EXPECT} ; export EXPECT ; \ runtest=$(RUNTEST); \ $$runtest $(RUNTESTFLAGS) testsuite_common_CPPFLAGS = \ -I$(srcdir)/common \ -I$(srcroot)/include \ -I../bfd @SIM_ENABLE_ARCH_aarch64_TRUE@nodist_aarch64_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/modules.c @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(patsubst %,aarch64/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/cpustate.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/interp.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/memory.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/sim-resume.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/simulator.o @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_SOURCES = @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64_run_LDADD = \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/nrun.o \ @SIM_ENABLE_ARCH_aarch64_TRUE@ aarch64/libsim.a \ @SIM_ENABLE_ARCH_aarch64_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_arm_TRUE@AM_CPPFLAGS_arm = -DMODET @SIM_ENABLE_ARCH_arm_TRUE@nodist_arm_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/modules.c @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_arm_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_arm_TRUE@arm_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/wrapper.o \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_arm_TRUE@ $(patsubst %,arm/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armemu32.o arm/arminit.o arm/armos.o arm/armsupp.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armvirt.o arm/thumbemu.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/armcopro.o arm/maverick.o arm/iwmmxt.o @SIM_ENABLE_ARCH_arm_TRUE@arm_run_SOURCES = @SIM_ENABLE_ARCH_arm_TRUE@arm_run_LDADD = \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/nrun.o \ @SIM_ENABLE_ARCH_arm_TRUE@ arm/libsim.a \ @SIM_ENABLE_ARCH_arm_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README @SIM_ENABLE_ARCH_avr_TRUE@nodist_avr_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/modules.c @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_avr_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_avr_TRUE@avr_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/interp.o \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_avr_TRUE@ $(patsubst %,avr/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/sim-resume.o @SIM_ENABLE_ARCH_avr_TRUE@avr_run_SOURCES = @SIM_ENABLE_ARCH_avr_TRUE@avr_run_LDADD = \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/nrun.o \ @SIM_ENABLE_ARCH_avr_TRUE@ avr/libsim.a \ @SIM_ENABLE_ARCH_avr_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_bfin_TRUE@AM_CPPFLAGS_bfin = $(SDL_CFLAGS) @SIM_ENABLE_ARCH_bfin_TRUE@nodist_bfin_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/modules.c @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_bfin_TRUE@bfin_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(patsubst %,bfin/dv-%.o,$(bfin_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/bfin-sim.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/devices.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/gui.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/interp.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/machs.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/sim-resume.o @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_SOURCES = @SIM_ENABLE_ARCH_bfin_TRUE@bfin_run_LDADD = \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/nrun.o \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin/libsim.a \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_bfin_TRUE@bfin_SIM_EXTRA_HW_DEVICES = \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_cec \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ctimer \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dma \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_dmac \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_amc \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_ddrc \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ebiu_sdc \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_emac \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_eppi \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_evt \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gpio2 \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_gptimer \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_jtag \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_mmu \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_nfc \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_otp \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pfmon \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pint \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_pll \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_ppi \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_rtc \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_sic \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_spi \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_trace \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_twi \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_uart2 \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wdog \ @SIM_ENABLE_ARCH_bfin_TRUE@ bfin_wp \ @SIM_ENABLE_ARCH_bfin_TRUE@ eth_phy @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf = -DWITH_TARGET_WORD_BITSIZE=64 @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_le.o = -DWANT_ISA_EBPFLE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_mloop_be.o = -DWANT_ISA_EBPFBE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_le.o = -DWANT_ISA_EBPFLE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_decode_be.o = -DWANT_ISA_EBPFBE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_le.o = -DWANT_ISA_EBPFLE @SIM_ENABLE_ARCH_bpf_TRUE@AM_CPPFLAGS_bpf_sem_be.o = -DWANT_ISA_EBPFBE @SIM_ENABLE_ARCH_bpf_TRUE@nodist_bpf_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/modules.c @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_bpf_TRUE@bpf_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(patsubst %,bpf/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_bpf_TRUE@ \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-run.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-scache.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-trace.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cgen-utils.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/arch.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/cpu.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/decode-be.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sem-be.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/bpf-helpers.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/sim-if.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/traps.o @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_SOURCES = @SIM_ENABLE_ARCH_bpf_TRUE@bpf_run_LDADD = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/nrun.o \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/libsim.a \ @SIM_ENABLE_ARCH_bpf_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be @SIM_ENABLE_ARCH_cr16_TRUE@nodist_cr16_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/modules.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_cr16_TRUE@cr16_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(patsubst %,cr16/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/interp.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/sim-resume.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.o @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_SOURCES = @SIM_ENABLE_ARCH_cr16_TRUE@cr16_run_LDADD = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/nrun.o \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/libsim.a \ @SIM_ENABLE_ARCH_cr16_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o @SIM_ENABLE_ARCH_cris_TRUE@nodist_cris_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/modules.c @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_cris_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_cris_TRUE@cris_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cris_TRUE@ $(patsubst %,cris/dv-%.o,$(cris_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_cris_TRUE@ \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-run.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-scache.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-trace.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cgen-utils.o \ @SIM_ENABLE_ARCH_cris_TRUE@ \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/arch.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv10f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv10.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev10.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv10.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/crisv32f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/cpuv32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/decodev32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/modelv32.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.o \ @SIM_ENABLE_ARCH_cris_TRUE@ \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/sim-if.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/traps.o @SIM_ENABLE_ARCH_cris_TRUE@cris_run_SOURCES = @SIM_ENABLE_ARCH_cris_TRUE@cris_run_LDADD = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/nrun.o \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/libsim.a \ @SIM_ENABLE_ARCH_cris_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_cris_TRUE@cris_SIM_EXTRA_HW_DEVICES = rv cris cris_900000xx @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_SOURCES = cris/rvdummy.c @SIM_ENABLE_ARCH_cris_TRUE@cris_rvdummy_LDADD = $(LIBIBERTY_LIB) @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f @SIM_ENABLE_ARCH_d10v_TRUE@nodist_d10v_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/modules.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_d10v_TRUE@d10v_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/interp.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(patsubst %,d10v/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/endian.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/sim-resume.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.o @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_SOURCES = @SIM_ENABLE_ARCH_d10v_TRUE@d10v_run_LDADD = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/nrun.o \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/libsim.a \ @SIM_ENABLE_ARCH_d10v_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o @SIM_ENABLE_ARCH_erc32_TRUE@READLINE_SRC = $(srcroot)/readline/readline @SIM_ENABLE_ARCH_erc32_TRUE@AM_CPPFLAGS_erc32 = $(READLINE_CFLAGS) \ @SIM_ENABLE_ARCH_erc32_TRUE@ -DFAST_UART @SIM_ENABLE_ARCH_erc32_TRUE@nodist_erc32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/modules.c @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_erc32_TRUE@erc32_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/erc32.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/exec.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/float.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/func.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/help.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/interf.o @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_SOURCES = @SIM_ENABLE_ARCH_erc32_TRUE@erc32_run_LDADD = \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/sis.o \ @SIM_ENABLE_ARCH_erc32_TRUE@ erc32/libsim.a \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(SIM_COMMON_LIBS) $(READLINE_LIB) $(TERMCAP_LIB) @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis @SIM_ENABLE_ARCH_examples_TRUE@nodist_example_synacor_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/modules.c @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_examples_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_examples_TRUE@ $(patsubst %,example-synacor/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/interp.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-main.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/sim-resume.o @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_SOURCES = @SIM_ENABLE_ARCH_examples_TRUE@example_synacor_run_LDADD = \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/nrun.o \ @SIM_ENABLE_ARCH_examples_TRUE@ example-synacor/libsim.a \ @SIM_ENABLE_ARCH_examples_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_frv_TRUE@AM_CPPFLAGS_frv = $(SIM_FRV_TRAPDUMP_FLAGS) @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_memory.o = -Wno-error @SIM_ENABLE_ARCH_frv_TRUE@AM_CFLAGS_frv_sem.o = -Wno-error @SIM_ENABLE_ARCH_frv_TRUE@nodist_frv_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/modules.c @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_frv_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_frv_TRUE@frv_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_frv_TRUE@ $(patsubst %,frv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_frv_TRUE@ \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-accfp.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-fpu.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-run.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-scache.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-trace.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-utils.o \ @SIM_ENABLE_ARCH_frv_TRUE@ \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/arch.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cgen-par.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cpu.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/decode.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/frv.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/model.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/sem.o \ @SIM_ENABLE_ARCH_frv_TRUE@ \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/cache.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/interrupts.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/memory.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/options.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/pipeline.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr400.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr450.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr500.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/profile-fr550.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/registers.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/reset.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/sim-if.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/traps.o @SIM_ENABLE_ARCH_frv_TRUE@frv_run_SOURCES = @SIM_ENABLE_ARCH_frv_TRUE@frv_run_LDADD = \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/nrun.o \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/libsim.a \ @SIM_ENABLE_ARCH_frv_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop @SIM_ENABLE_ARCH_ft32_TRUE@nodist_ft32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/modules.c @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_ft32_TRUE@ft32_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(patsubst %,ft32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/interp.o \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/sim-resume.o @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_SOURCES = @SIM_ENABLE_ARCH_ft32_TRUE@ft32_run_LDADD = \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/nrun.o \ @SIM_ENABLE_ARCH_ft32_TRUE@ ft32/libsim.a \ @SIM_ENABLE_ARCH_ft32_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_h8300_TRUE@nodist_h8300_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/modules.c @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_h8300_TRUE@h8300_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/compile.o \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(patsubst %,h8300/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/sim-resume.o @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_SOURCES = @SIM_ENABLE_ARCH_h8300_TRUE@h8300_run_LDADD = \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/nrun.o \ @SIM_ENABLE_ARCH_h8300_TRUE@ h8300/libsim.a \ @SIM_ENABLE_ARCH_h8300_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_iq2000_TRUE@nodist_iq2000_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/modules.c @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(patsubst %,iq2000/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-run.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-scache.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-trace.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cgen-utils.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/arch.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/cpu.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/decode.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/iq2000.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sem.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/model.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/sim-if.o @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_SOURCES = @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_run_LDADD = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/nrun.o \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/libsim.a \ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop @SIM_ENABLE_ARCH_lm32_TRUE@nodist_lm32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/modules.c @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_lm32_TRUE@lm32_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(patsubst %,lm32/dv-%.o,$(lm32_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_lm32_TRUE@ \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-run.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-scache.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-trace.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cgen-utils.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/arch.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/cpu.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/decode.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sem.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/model.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/lm32.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/sim-if.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/traps.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/user.o @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_SOURCES = @SIM_ENABLE_ARCH_lm32_TRUE@lm32_run_LDADD = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/nrun.o \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/libsim.a \ @SIM_ENABLE_ARCH_lm32_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_lm32_TRUE@lm32_SIM_EXTRA_HW_DEVICES = lm32cpu lm32timer lm32uart @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop @SIM_ENABLE_ARCH_m32c_TRUE@AM_CPPFLAGS_m32c = -DTIMER_A @SIM_ENABLE_ARCH_m32c_TRUE@nodist_m32c_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/modules.c @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_m32c_TRUE@m32c_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/gdb-if.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/int.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/load.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/mem.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/misc.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/reg.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/srcdest.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/syscalls.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/trace.o @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_SOURCES = @SIM_ENABLE_ARCH_m32c_TRUE@m32c_run_LDADD = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/main.o \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/libsim.a \ @SIM_ENABLE_ARCH_m32c_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable # leak detection while running it. @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.c @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_m32r_TRUE@m32r_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(patsubst %,m32r/dv-%.o,$(m32r_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-run.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-scache.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-trace.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cgen-utils.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/arch.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sem.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32rx.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpux.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decodex.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modelx.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/m32r2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/cpu2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/decode2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/model2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/sim-if.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/traps.o @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_SOURCES = @SIM_ENABLE_ARCH_m32r_TRUE@m32r_run_LDADD = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/nrun.o \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/libsim.a \ @SIM_ENABLE_ARCH_m32r_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_m32r_TRUE@m32r_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2 @SIM_ENABLE_ARCH_m68hc11_TRUE@AM_CPPFLAGS_m68hc11 = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_CELL_BITSIZE=32 \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_ADDRESS_BITSIZE=32 \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ -DWITH_TARGET_WORD_MSB=31 @SIM_ENABLE_ARCH_m68hc11_TRUE@nodist_m68hc11_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/modules.c @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interp.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/emulos.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/interrupts.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11_sim.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(patsubst %,m68hc11/dv-%.o,$(m68hc11_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/sim-resume.o @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_SOURCES = @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_run_LDADD = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/nrun.o \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/libsim.a \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_SIM_EXTRA_HW_DEVICES = m68hc11 m68hc11sio m68hc11eepr m68hc11tim m68hc11spi nvram @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c @SIM_ENABLE_ARCH_mcore_TRUE@nodist_mcore_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/modules.c @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_mcore_TRUE@mcore_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/interp.o \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(patsubst %,mcore/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/sim-resume.o @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_SOURCES = @SIM_ENABLE_ARCH_mcore_TRUE@mcore_run_LDADD = \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/nrun.o \ @SIM_ENABLE_ARCH_mcore_TRUE@ mcore/libsim.a \ @SIM_ENABLE_ARCH_mcore_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_microblaze_TRUE@nodist_microblaze_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/modules.c @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/interp.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(patsubst %,microblaze/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/sim-resume.o @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_SOURCES = @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze_run_LDADD = \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/nrun.o \ @SIM_ENABLE_ARCH_microblaze_TRUE@ microblaze/libsim.a \ @SIM_ENABLE_ARCH_microblaze_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_mips_TRUE@AM_CPPFLAGS_mips = \ @SIM_ENABLE_ARCH_mips_TRUE@ @SIM_MIPS_SUBTARGET@ \ @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \ @SIM_ENABLE_ARCH_mips_TRUE@ -DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@ @SIM_ENABLE_ARCH_mips_TRUE@mips_GEN_OBJ = $(am__append_68) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_69) $(am__append_70) @SIM_ENABLE_ARCH_mips_TRUE@nodist_mips_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/modules.c @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_mips_TRUE@mips_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/interp.o \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_GEN_OBJ) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(patsubst %,mips/dv-%.o,$(mips_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/cp1.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-main.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/sim-resume.o @SIM_ENABLE_ARCH_mips_TRUE@EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ) @SIM_ENABLE_ARCH_mips_TRUE@mips_run_SOURCES = @SIM_ENABLE_ARCH_mips_TRUE@mips_run_LDADD = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/nrun.o \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/libsim.a \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_mips_TRUE@mips_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_IGEN_ITABLE = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/itable.c @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_SINGLE = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/support.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/engine.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/irun.c @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16_support.c \ @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m32_support.c @SIM_ENABLE_ARCH_mips_TRUE@mips_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_BUILT_SRC_FROM_IGEN_ITABLE) \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/stamp-igen-itable \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_74) $(am__append_75) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(am__append_76) @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN = $(srcdir)/mips/mips.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_INSN_INC = \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/dsp2.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/m16e.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/mdmx.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromipsdsp.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/micromips.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r2.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3264r6.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/mips3d.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/sb1.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/tx.igen \ @SIM_ENABLE_ARCH_mips_TRUE@ mips/vr.igen @SIM_ENABLE_ARCH_mips_TRUE@mips_IGEN_DC = $(srcdir)/mips/mips.dc @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc @SIM_ENABLE_ARCH_mn10300_TRUE@AM_CPPFLAGS_mn10300 = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -DPOLL_QUIT_INTERVAL=0x20 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 @SIM_ENABLE_ARCH_mn10300_TRUE@nodist_mn10300_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.c @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES = @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/libsim.a \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_SIM_EXTRA_HW_DEVICES = mn103cpu mn103int mn103tim mn103ser mn103iop @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc @SIM_ENABLE_ARCH_moxie_TRUE@AM_CPPFLAGS_moxie = -DDTB="\"$(dtbdir)/moxie-gdb.dtb\"" @SIM_ENABLE_ARCH_moxie_TRUE@nodist_moxie_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/modules.c @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_moxie_TRUE@moxie_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(patsubst %,moxie/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/interp.o \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/sim-resume.o @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_SOURCES = @SIM_ENABLE_ARCH_moxie_TRUE@moxie_run_LDADD = \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/nrun.o \ @SIM_ENABLE_ARCH_moxie_TRUE@ moxie/libsim.a \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb @SIM_ENABLE_ARCH_msp430_TRUE@nodist_msp430_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/modules.c @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_msp430_TRUE@msp430_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(patsubst %,msp430/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/msp430-sim.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/sim-resume.o @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_SOURCES = @SIM_ENABLE_ARCH_msp430_TRUE@msp430_run_LDADD = \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/nrun.o \ @SIM_ENABLE_ARCH_msp430_TRUE@ msp430/libsim.a \ @SIM_ENABLE_ARCH_msp430_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_or1k_TRUE@AM_CPPFLAGS_or1k = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 @SIM_ENABLE_ARCH_or1k_TRUE@nodist_or1k_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/modules.c @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_or1k_TRUE@or1k_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(patsubst %,or1k/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_or1k_TRUE@ \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-accfp.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-fpu.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-run.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-scache.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-trace.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cgen-utils.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/arch.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/cpu.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/decode.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/model.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sem.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/or1k.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/sim-if.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/traps.o @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_SOURCES = @SIM_ENABLE_ARCH_or1k_TRUE@or1k_run_LDADD = \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/nrun.o \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/libsim.a \ @SIM_ENABLE_ARCH_or1k_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_SOURCES = @SIM_ENABLE_ARCH_ppc_TRUE@ppc_run_LDADD = \ @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/main.o \ @SIM_ENABLE_ARCH_ppc_TRUE@ ppc/libsim.a \ @SIM_ENABLE_ARCH_ppc_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN @SIM_ENABLE_ARCH_pru_TRUE@nodist_pru_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/modules.c @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_pru_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_pru_TRUE@pru_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_pru_TRUE@ $(patsubst %,pru/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/interp.o \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/sim-resume.o @SIM_ENABLE_ARCH_pru_TRUE@pru_run_SOURCES = @SIM_ENABLE_ARCH_pru_TRUE@pru_run_LDADD = \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/nrun.o \ @SIM_ENABLE_ARCH_pru_TRUE@ pru/libsim.a \ @SIM_ENABLE_ARCH_pru_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_riscv_TRUE@AM_CPPFLAGS_riscv = -DWITH_TARGET_WORD_BITSIZE=$(SIM_RISCV_BITSIZE) @SIM_ENABLE_ARCH_riscv_TRUE@nodist_riscv_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/modules.c @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_riscv_TRUE@riscv_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(patsubst %,riscv/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/interp.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/machs.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-main.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/sim-resume.o @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_SOURCES = @SIM_ENABLE_ARCH_riscv_TRUE@riscv_run_LDADD = \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/nrun.o \ @SIM_ENABLE_ARCH_riscv_TRUE@ riscv/libsim.a \ @SIM_ENABLE_ARCH_riscv_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_rl78_TRUE@nodist_rl78_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/modules.c @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_rl78_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_rl78_TRUE@rl78_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/load.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/mem.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/cpu.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/rl78.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/gdb-if.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/trace.o @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_SOURCES = @SIM_ENABLE_ARCH_rl78_TRUE@rl78_run_LDADD = \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/main.o \ @SIM_ENABLE_ARCH_rl78_TRUE@ rl78/libsim.a \ @SIM_ENABLE_ARCH_rl78_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_rx_TRUE@AM_CPPFLAGS_rx = $(SIM_RX_CYCLE_ACCURATE_FLAGS) @SIM_ENABLE_ARCH_rx_TRUE@nodist_rx_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/modules.c @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_rx_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_rx_TRUE@rx_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/fpu.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/load.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/mem.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/misc.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/reg.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/rx.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/syscalls.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/trace.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/gdb-if.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/err.o @SIM_ENABLE_ARCH_rx_TRUE@rx_run_SOURCES = @SIM_ENABLE_ARCH_rx_TRUE@rx_run_LDADD = \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/main.o \ @SIM_ENABLE_ARCH_rx_TRUE@ rx/libsim.a \ @SIM_ENABLE_ARCH_rx_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt @SIM_ENABLE_ARCH_sh_TRUE@nodist_sh_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/modules.c @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_sh_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_sh_TRUE@sh_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/interp.o \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_sh_TRUE@ $(patsubst %,sh/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.o @SIM_ENABLE_ARCH_sh_TRUE@sh_run_SOURCES = @SIM_ENABLE_ARCH_sh_TRUE@sh_run_LDADD = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/nrun.o \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/libsim.a \ @SIM_ENABLE_ARCH_sh_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c @SIM_ENABLE_ARCH_v850_TRUE@AM_CPPFLAGS_v850 = -DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31 @SIM_ENABLE_ARCH_v850_TRUE@nodist_v850_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/modules.c @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_v850_TRUE@ $(common_libcommon_a_SOURCES) @SIM_ENABLE_ARCH_v850_TRUE@v850_libsim_a_LIBADD = \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/%,$(SIM_NEW_COMMON_OBJS)) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(patsubst %,v850/dv-%.o,$(SIM_HW_DEVICES)) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/simops.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/interp.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/sim-resume.o @SIM_ENABLE_ARCH_v850_TRUE@v850_run_SOURCES = @SIM_ENABLE_ARCH_v850_TRUE@v850_run_LDADD = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/nrun.o \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/libsim.a \ @SIM_ENABLE_ARCH_v850_TRUE@ $(SIM_COMMON_LIBS) @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850.dc all: $(BUILT_SOURCES) config.h $(MAKE) $(AM_MAKEFLAGS) all-recursive .SUFFIXES: .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs am--refresh: Makefile @: $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ *$$dep*) \ echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \ $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \ && exit 0; \ exit 1;; \ esac; \ done; \ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \ $(am__cd) $(top_srcdir) && \ $(AUTOMAKE) --foreign Makefile Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status @case '$?' in \ *config.status*) \ echo ' $(SHELL) ./config.status'; \ $(SHELL) ./config.status;; \ *) \ echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \ cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \ esac; $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/aarch64/local.mk $(srcdir)/arm/local.mk $(srcdir)/avr/local.mk $(srcdir)/bfin/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/example-synacor/local.mk $(srcdir)/frv/local.mk $(srcdir)/ft32/local.mk $(srcdir)/h8300/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mcore/local.mk $(srcdir)/microblaze/local.mk $(srcdir)/mips/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/msp430/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/pru/local.mk $(srcdir)/riscv/local.mk $(srcdir)/rl78/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty): $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) $(SHELL) ./config.status --recheck $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) $(am__cd) $(srcdir) && $(AUTOCONF) $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps) $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS) $(am__aclocal_m4_deps): config.h: stamp-h1 @test -f $@ || rm -f stamp-h1 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status @rm -f stamp-h1 cd $(top_builddir) && $(SHELL) ./config.status config.h $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) ($(am__cd) $(top_srcdir) && $(AUTOHEADER)) rm -f stamp-h1 touch $@ distclean-hdr: -rm -f config.h stamp-h1 aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ bpf/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ m68hc11/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ mcore/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ microblaze/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ mips/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ mn10300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ moxie/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ msp430/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ or1k/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ ppc/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ rl78/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ rx/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ sh/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ erc32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ v850/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ example-synacor/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ arch-subdir.mk: $(top_builddir)/config.status $(srcdir)/arch-subdir.mk.in cd $(top_builddir) && $(SHELL) ./config.status $@ .gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ clean-noinstLIBRARIES: -test -z "$(noinst_LIBRARIES)" || rm -f $(noinst_LIBRARIES) common/$(am__dirstamp): @$(MKDIR_P) common @: > common/$(am__dirstamp) common/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) common/$(DEPDIR) @: > common/$(DEPDIR)/$(am__dirstamp) common/callback.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/portability.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/sim-load.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/sim-signal.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/syscall.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/target-newlib-errno.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/target-newlib-open.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/target-newlib-signal.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/target-newlib-syscall.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) common/version.$(OBJEXT): common/$(am__dirstamp) \ common/$(DEPDIR)/$(am__dirstamp) aarch64/$(am__dirstamp): @$(MKDIR_P) aarch64 @: > aarch64/$(am__dirstamp) aarch64/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) aarch64/$(DEPDIR) @: > aarch64/$(DEPDIR)/$(am__dirstamp) aarch64/modules.$(OBJEXT): aarch64/$(am__dirstamp) \ aarch64/$(DEPDIR)/$(am__dirstamp) aarch64/libsim.a: $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_DEPENDENCIES) $(EXTRA_aarch64_libsim_a_DEPENDENCIES) aarch64/$(am__dirstamp) $(AM_V_at)-rm -f aarch64/libsim.a $(AM_V_AR)$(aarch64_libsim_a_AR) aarch64/libsim.a $(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) aarch64/libsim.a arm/$(am__dirstamp): @$(MKDIR_P) arm @: > arm/$(am__dirstamp) arm/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) arm/$(DEPDIR) @: > arm/$(DEPDIR)/$(am__dirstamp) arm/modules.$(OBJEXT): arm/$(am__dirstamp) \ arm/$(DEPDIR)/$(am__dirstamp) arm/libsim.a: $(arm_libsim_a_OBJECTS) $(arm_libsim_a_DEPENDENCIES) $(EXTRA_arm_libsim_a_DEPENDENCIES) arm/$(am__dirstamp) $(AM_V_at)-rm -f arm/libsim.a $(AM_V_AR)$(arm_libsim_a_AR) arm/libsim.a $(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) arm/libsim.a avr/$(am__dirstamp): @$(MKDIR_P) avr @: > avr/$(am__dirstamp) avr/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) avr/$(DEPDIR) @: > avr/$(DEPDIR)/$(am__dirstamp) avr/modules.$(OBJEXT): avr/$(am__dirstamp) \ avr/$(DEPDIR)/$(am__dirstamp) avr/libsim.a: $(avr_libsim_a_OBJECTS) $(avr_libsim_a_DEPENDENCIES) $(EXTRA_avr_libsim_a_DEPENDENCIES) avr/$(am__dirstamp) $(AM_V_at)-rm -f avr/libsim.a $(AM_V_AR)$(avr_libsim_a_AR) avr/libsim.a $(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) avr/libsim.a bfin/$(am__dirstamp): @$(MKDIR_P) bfin @: > bfin/$(am__dirstamp) bfin/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) bfin/$(DEPDIR) @: > bfin/$(DEPDIR)/$(am__dirstamp) bfin/modules.$(OBJEXT): bfin/$(am__dirstamp) \ bfin/$(DEPDIR)/$(am__dirstamp) bfin/libsim.a: $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_DEPENDENCIES) $(EXTRA_bfin_libsim_a_DEPENDENCIES) bfin/$(am__dirstamp) $(AM_V_at)-rm -f bfin/libsim.a $(AM_V_AR)$(bfin_libsim_a_AR) bfin/libsim.a $(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) bfin/libsim.a bpf/$(am__dirstamp): @$(MKDIR_P) bpf @: > bpf/$(am__dirstamp) bpf/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) bpf/$(DEPDIR) @: > bpf/$(DEPDIR)/$(am__dirstamp) bpf/modules.$(OBJEXT): bpf/$(am__dirstamp) \ bpf/$(DEPDIR)/$(am__dirstamp) bpf/libsim.a: $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_DEPENDENCIES) $(EXTRA_bpf_libsim_a_DEPENDENCIES) bpf/$(am__dirstamp) $(AM_V_at)-rm -f bpf/libsim.a $(AM_V_AR)$(bpf_libsim_a_AR) bpf/libsim.a $(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) bpf/libsim.a common/libcommon.a: $(common_libcommon_a_OBJECTS) $(common_libcommon_a_DEPENDENCIES) $(EXTRA_common_libcommon_a_DEPENDENCIES) common/$(am__dirstamp) $(AM_V_at)-rm -f common/libcommon.a $(AM_V_AR)$(common_libcommon_a_AR) common/libcommon.a $(common_libcommon_a_OBJECTS) $(common_libcommon_a_LIBADD) $(AM_V_at)$(RANLIB) common/libcommon.a cr16/$(am__dirstamp): @$(MKDIR_P) cr16 @: > cr16/$(am__dirstamp) cr16/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) cr16/$(DEPDIR) @: > cr16/$(DEPDIR)/$(am__dirstamp) cr16/modules.$(OBJEXT): cr16/$(am__dirstamp) \ cr16/$(DEPDIR)/$(am__dirstamp) cr16/libsim.a: $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_DEPENDENCIES) $(EXTRA_cr16_libsim_a_DEPENDENCIES) cr16/$(am__dirstamp) $(AM_V_at)-rm -f cr16/libsim.a $(AM_V_AR)$(cr16_libsim_a_AR) cr16/libsim.a $(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) cr16/libsim.a cris/$(am__dirstamp): @$(MKDIR_P) cris @: > cris/$(am__dirstamp) cris/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) cris/$(DEPDIR) @: > cris/$(DEPDIR)/$(am__dirstamp) cris/modules.$(OBJEXT): cris/$(am__dirstamp) \ cris/$(DEPDIR)/$(am__dirstamp) cris/libsim.a: $(cris_libsim_a_OBJECTS) $(cris_libsim_a_DEPENDENCIES) $(EXTRA_cris_libsim_a_DEPENDENCIES) cris/$(am__dirstamp) $(AM_V_at)-rm -f cris/libsim.a $(AM_V_AR)$(cris_libsim_a_AR) cris/libsim.a $(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) cris/libsim.a d10v/$(am__dirstamp): @$(MKDIR_P) d10v @: > d10v/$(am__dirstamp) d10v/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) d10v/$(DEPDIR) @: > d10v/$(DEPDIR)/$(am__dirstamp) d10v/modules.$(OBJEXT): d10v/$(am__dirstamp) \ d10v/$(DEPDIR)/$(am__dirstamp) d10v/libsim.a: $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_DEPENDENCIES) $(EXTRA_d10v_libsim_a_DEPENDENCIES) d10v/$(am__dirstamp) $(AM_V_at)-rm -f d10v/libsim.a $(AM_V_AR)$(d10v_libsim_a_AR) d10v/libsim.a $(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) d10v/libsim.a erc32/$(am__dirstamp): @$(MKDIR_P) erc32 @: > erc32/$(am__dirstamp) erc32/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) erc32/$(DEPDIR) @: > erc32/$(DEPDIR)/$(am__dirstamp) erc32/modules.$(OBJEXT): erc32/$(am__dirstamp) \ erc32/$(DEPDIR)/$(am__dirstamp) erc32/libsim.a: $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_DEPENDENCIES) $(EXTRA_erc32_libsim_a_DEPENDENCIES) erc32/$(am__dirstamp) $(AM_V_at)-rm -f erc32/libsim.a $(AM_V_AR)$(erc32_libsim_a_AR) erc32/libsim.a $(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) erc32/libsim.a example-synacor/$(am__dirstamp): @$(MKDIR_P) example-synacor @: > example-synacor/$(am__dirstamp) example-synacor/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) example-synacor/$(DEPDIR) @: > example-synacor/$(DEPDIR)/$(am__dirstamp) example-synacor/modules.$(OBJEXT): example-synacor/$(am__dirstamp) \ example-synacor/$(DEPDIR)/$(am__dirstamp) example-synacor/libsim.a: $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_DEPENDENCIES) $(EXTRA_example_synacor_libsim_a_DEPENDENCIES) example-synacor/$(am__dirstamp) $(AM_V_at)-rm -f example-synacor/libsim.a $(AM_V_AR)$(example_synacor_libsim_a_AR) example-synacor/libsim.a $(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) example-synacor/libsim.a frv/$(am__dirstamp): @$(MKDIR_P) frv @: > frv/$(am__dirstamp) frv/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) frv/$(DEPDIR) @: > frv/$(DEPDIR)/$(am__dirstamp) frv/modules.$(OBJEXT): frv/$(am__dirstamp) \ frv/$(DEPDIR)/$(am__dirstamp) frv/libsim.a: $(frv_libsim_a_OBJECTS) $(frv_libsim_a_DEPENDENCIES) $(EXTRA_frv_libsim_a_DEPENDENCIES) frv/$(am__dirstamp) $(AM_V_at)-rm -f frv/libsim.a $(AM_V_AR)$(frv_libsim_a_AR) frv/libsim.a $(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) frv/libsim.a ft32/$(am__dirstamp): @$(MKDIR_P) ft32 @: > ft32/$(am__dirstamp) ft32/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) ft32/$(DEPDIR) @: > ft32/$(DEPDIR)/$(am__dirstamp) ft32/modules.$(OBJEXT): ft32/$(am__dirstamp) \ ft32/$(DEPDIR)/$(am__dirstamp) ft32/libsim.a: $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_DEPENDENCIES) $(EXTRA_ft32_libsim_a_DEPENDENCIES) ft32/$(am__dirstamp) $(AM_V_at)-rm -f ft32/libsim.a $(AM_V_AR)$(ft32_libsim_a_AR) ft32/libsim.a $(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) ft32/libsim.a h8300/$(am__dirstamp): @$(MKDIR_P) h8300 @: > h8300/$(am__dirstamp) h8300/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) h8300/$(DEPDIR) @: > h8300/$(DEPDIR)/$(am__dirstamp) h8300/modules.$(OBJEXT): h8300/$(am__dirstamp) \ h8300/$(DEPDIR)/$(am__dirstamp) h8300/libsim.a: $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_DEPENDENCIES) $(EXTRA_h8300_libsim_a_DEPENDENCIES) h8300/$(am__dirstamp) $(AM_V_at)-rm -f h8300/libsim.a $(AM_V_AR)$(h8300_libsim_a_AR) h8300/libsim.a $(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) h8300/libsim.a igen/$(am__dirstamp): @$(MKDIR_P) igen @: > igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) igen/$(DEPDIR) @: > igen/$(DEPDIR)/$(am__dirstamp) igen/table.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/lf.$(OBJEXT): igen/$(am__dirstamp) igen/$(DEPDIR)/$(am__dirstamp) igen/misc.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/filter_host.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/ld-decode.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/ld-cache.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/filter.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/ld-insn.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-model.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-itable.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-icache.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-semantics.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-idecode.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-support.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen-engine.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/gen.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) iq2000/$(am__dirstamp): @$(MKDIR_P) iq2000 @: > iq2000/$(am__dirstamp) iq2000/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) iq2000/$(DEPDIR) @: > iq2000/$(DEPDIR)/$(am__dirstamp) iq2000/modules.$(OBJEXT): iq2000/$(am__dirstamp) \ iq2000/$(DEPDIR)/$(am__dirstamp) iq2000/libsim.a: $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_DEPENDENCIES) $(EXTRA_iq2000_libsim_a_DEPENDENCIES) iq2000/$(am__dirstamp) $(AM_V_at)-rm -f iq2000/libsim.a $(AM_V_AR)$(iq2000_libsim_a_AR) iq2000/libsim.a $(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) iq2000/libsim.a lm32/$(am__dirstamp): @$(MKDIR_P) lm32 @: > lm32/$(am__dirstamp) lm32/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) lm32/$(DEPDIR) @: > lm32/$(DEPDIR)/$(am__dirstamp) lm32/modules.$(OBJEXT): lm32/$(am__dirstamp) \ lm32/$(DEPDIR)/$(am__dirstamp) lm32/libsim.a: $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_DEPENDENCIES) $(EXTRA_lm32_libsim_a_DEPENDENCIES) lm32/$(am__dirstamp) $(AM_V_at)-rm -f lm32/libsim.a $(AM_V_AR)$(lm32_libsim_a_AR) lm32/libsim.a $(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) lm32/libsim.a m32c/$(am__dirstamp): @$(MKDIR_P) m32c @: > m32c/$(am__dirstamp) m32c/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) m32c/$(DEPDIR) @: > m32c/$(DEPDIR)/$(am__dirstamp) m32c/modules.$(OBJEXT): m32c/$(am__dirstamp) \ m32c/$(DEPDIR)/$(am__dirstamp) m32c/libsim.a: $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_DEPENDENCIES) $(EXTRA_m32c_libsim_a_DEPENDENCIES) m32c/$(am__dirstamp) $(AM_V_at)-rm -f m32c/libsim.a $(AM_V_AR)$(m32c_libsim_a_AR) m32c/libsim.a $(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) m32c/libsim.a m32r/$(am__dirstamp): @$(MKDIR_P) m32r @: > m32r/$(am__dirstamp) m32r/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) m32r/$(DEPDIR) @: > m32r/$(DEPDIR)/$(am__dirstamp) m32r/modules.$(OBJEXT): m32r/$(am__dirstamp) \ m32r/$(DEPDIR)/$(am__dirstamp) m32r/libsim.a: $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_DEPENDENCIES) $(EXTRA_m32r_libsim_a_DEPENDENCIES) m32r/$(am__dirstamp) $(AM_V_at)-rm -f m32r/libsim.a $(AM_V_AR)$(m32r_libsim_a_AR) m32r/libsim.a $(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) m32r/libsim.a m68hc11/$(am__dirstamp): @$(MKDIR_P) m68hc11 @: > m68hc11/$(am__dirstamp) m68hc11/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) m68hc11/$(DEPDIR) @: > m68hc11/$(DEPDIR)/$(am__dirstamp) m68hc11/modules.$(OBJEXT): m68hc11/$(am__dirstamp) \ m68hc11/$(DEPDIR)/$(am__dirstamp) m68hc11/libsim.a: $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_DEPENDENCIES) $(EXTRA_m68hc11_libsim_a_DEPENDENCIES) m68hc11/$(am__dirstamp) $(AM_V_at)-rm -f m68hc11/libsim.a $(AM_V_AR)$(m68hc11_libsim_a_AR) m68hc11/libsim.a $(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) m68hc11/libsim.a mcore/$(am__dirstamp): @$(MKDIR_P) mcore @: > mcore/$(am__dirstamp) mcore/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) mcore/$(DEPDIR) @: > mcore/$(DEPDIR)/$(am__dirstamp) mcore/modules.$(OBJEXT): mcore/$(am__dirstamp) \ mcore/$(DEPDIR)/$(am__dirstamp) mcore/libsim.a: $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_DEPENDENCIES) $(EXTRA_mcore_libsim_a_DEPENDENCIES) mcore/$(am__dirstamp) $(AM_V_at)-rm -f mcore/libsim.a $(AM_V_AR)$(mcore_libsim_a_AR) mcore/libsim.a $(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) mcore/libsim.a microblaze/$(am__dirstamp): @$(MKDIR_P) microblaze @: > microblaze/$(am__dirstamp) microblaze/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) microblaze/$(DEPDIR) @: > microblaze/$(DEPDIR)/$(am__dirstamp) microblaze/modules.$(OBJEXT): microblaze/$(am__dirstamp) \ microblaze/$(DEPDIR)/$(am__dirstamp) microblaze/libsim.a: $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_DEPENDENCIES) $(EXTRA_microblaze_libsim_a_DEPENDENCIES) microblaze/$(am__dirstamp) $(AM_V_at)-rm -f microblaze/libsim.a $(AM_V_AR)$(microblaze_libsim_a_AR) microblaze/libsim.a $(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) microblaze/libsim.a mips/$(am__dirstamp): @$(MKDIR_P) mips @: > mips/$(am__dirstamp) mips/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) mips/$(DEPDIR) @: > mips/$(DEPDIR)/$(am__dirstamp) mips/modules.$(OBJEXT): mips/$(am__dirstamp) \ mips/$(DEPDIR)/$(am__dirstamp) mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mips_libsim_a_DEPENDENCIES) mips/$(am__dirstamp) $(AM_V_at)-rm -f mips/libsim.a $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) mips/libsim.a mn10300/$(am__dirstamp): @$(MKDIR_P) mn10300 @: > mn10300/$(am__dirstamp) mn10300/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) mn10300/$(DEPDIR) @: > mn10300/$(DEPDIR)/$(am__dirstamp) mn10300/modules.$(OBJEXT): mn10300/$(am__dirstamp) \ mn10300/$(DEPDIR)/$(am__dirstamp) mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp) $(AM_V_at)-rm -f mn10300/libsim.a $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) mn10300/libsim.a moxie/$(am__dirstamp): @$(MKDIR_P) moxie @: > moxie/$(am__dirstamp) moxie/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) moxie/$(DEPDIR) @: > moxie/$(DEPDIR)/$(am__dirstamp) moxie/modules.$(OBJEXT): moxie/$(am__dirstamp) \ moxie/$(DEPDIR)/$(am__dirstamp) moxie/libsim.a: $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_DEPENDENCIES) $(EXTRA_moxie_libsim_a_DEPENDENCIES) moxie/$(am__dirstamp) $(AM_V_at)-rm -f moxie/libsim.a $(AM_V_AR)$(moxie_libsim_a_AR) moxie/libsim.a $(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) moxie/libsim.a msp430/$(am__dirstamp): @$(MKDIR_P) msp430 @: > msp430/$(am__dirstamp) msp430/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) msp430/$(DEPDIR) @: > msp430/$(DEPDIR)/$(am__dirstamp) msp430/modules.$(OBJEXT): msp430/$(am__dirstamp) \ msp430/$(DEPDIR)/$(am__dirstamp) msp430/libsim.a: $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_DEPENDENCIES) $(EXTRA_msp430_libsim_a_DEPENDENCIES) msp430/$(am__dirstamp) $(AM_V_at)-rm -f msp430/libsim.a $(AM_V_AR)$(msp430_libsim_a_AR) msp430/libsim.a $(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) msp430/libsim.a or1k/$(am__dirstamp): @$(MKDIR_P) or1k @: > or1k/$(am__dirstamp) or1k/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) or1k/$(DEPDIR) @: > or1k/$(DEPDIR)/$(am__dirstamp) or1k/modules.$(OBJEXT): or1k/$(am__dirstamp) \ or1k/$(DEPDIR)/$(am__dirstamp) or1k/libsim.a: $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_DEPENDENCIES) $(EXTRA_or1k_libsim_a_DEPENDENCIES) or1k/$(am__dirstamp) $(AM_V_at)-rm -f or1k/libsim.a $(AM_V_AR)$(or1k_libsim_a_AR) or1k/libsim.a $(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) or1k/libsim.a pru/$(am__dirstamp): @$(MKDIR_P) pru @: > pru/$(am__dirstamp) pru/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) pru/$(DEPDIR) @: > pru/$(DEPDIR)/$(am__dirstamp) pru/modules.$(OBJEXT): pru/$(am__dirstamp) \ pru/$(DEPDIR)/$(am__dirstamp) pru/libsim.a: $(pru_libsim_a_OBJECTS) $(pru_libsim_a_DEPENDENCIES) $(EXTRA_pru_libsim_a_DEPENDENCIES) pru/$(am__dirstamp) $(AM_V_at)-rm -f pru/libsim.a $(AM_V_AR)$(pru_libsim_a_AR) pru/libsim.a $(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) pru/libsim.a riscv/$(am__dirstamp): @$(MKDIR_P) riscv @: > riscv/$(am__dirstamp) riscv/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) riscv/$(DEPDIR) @: > riscv/$(DEPDIR)/$(am__dirstamp) riscv/modules.$(OBJEXT): riscv/$(am__dirstamp) \ riscv/$(DEPDIR)/$(am__dirstamp) riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp) $(AM_V_at)-rm -f riscv/libsim.a $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) riscv/libsim.a rl78/$(am__dirstamp): @$(MKDIR_P) rl78 @: > rl78/$(am__dirstamp) rl78/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) rl78/$(DEPDIR) @: > rl78/$(DEPDIR)/$(am__dirstamp) rl78/modules.$(OBJEXT): rl78/$(am__dirstamp) \ rl78/$(DEPDIR)/$(am__dirstamp) rl78/libsim.a: $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_DEPENDENCIES) $(EXTRA_rl78_libsim_a_DEPENDENCIES) rl78/$(am__dirstamp) $(AM_V_at)-rm -f rl78/libsim.a $(AM_V_AR)$(rl78_libsim_a_AR) rl78/libsim.a $(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) rl78/libsim.a rx/$(am__dirstamp): @$(MKDIR_P) rx @: > rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) rx/$(DEPDIR) @: > rx/$(DEPDIR)/$(am__dirstamp) rx/modules.$(OBJEXT): rx/$(am__dirstamp) rx/$(DEPDIR)/$(am__dirstamp) rx/libsim.a: $(rx_libsim_a_OBJECTS) $(rx_libsim_a_DEPENDENCIES) $(EXTRA_rx_libsim_a_DEPENDENCIES) rx/$(am__dirstamp) $(AM_V_at)-rm -f rx/libsim.a $(AM_V_AR)$(rx_libsim_a_AR) rx/libsim.a $(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) rx/libsim.a sh/$(am__dirstamp): @$(MKDIR_P) sh @: > sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) sh/$(DEPDIR) @: > sh/$(DEPDIR)/$(am__dirstamp) sh/modules.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp) sh/libsim.a: $(sh_libsim_a_OBJECTS) $(sh_libsim_a_DEPENDENCIES) $(EXTRA_sh_libsim_a_DEPENDENCIES) sh/$(am__dirstamp) $(AM_V_at)-rm -f sh/libsim.a $(AM_V_AR)$(sh_libsim_a_AR) sh/libsim.a $(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) sh/libsim.a v850/$(am__dirstamp): @$(MKDIR_P) v850 @: > v850/$(am__dirstamp) v850/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) v850/$(DEPDIR) @: > v850/$(DEPDIR)/$(am__dirstamp) v850/modules.$(OBJEXT): v850/$(am__dirstamp) \ v850/$(DEPDIR)/$(am__dirstamp) v850/libsim.a: $(v850_libsim_a_OBJECTS) $(v850_libsim_a_DEPENDENCIES) $(EXTRA_v850_libsim_a_DEPENDENCIES) v850/$(am__dirstamp) $(AM_V_at)-rm -f v850/libsim.a $(AM_V_AR)$(v850_libsim_a_AR) v850/libsim.a $(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD) $(AM_V_at)$(RANLIB) v850/libsim.a clean-checkPROGRAMS: @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \ echo " rm -f" $$list; \ rm -f $$list || exit $$?; \ test -n "$(EXEEXT)" || exit 0; \ list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \ echo " rm -f" $$list; \ rm -f $$list clean-noinstPROGRAMS: @list='$(noinst_PROGRAMS)'; test -n "$$list" || exit 0; \ echo " rm -f" $$list; \ rm -f $$list || exit $$?; \ test -n "$(EXEEXT)" || exit 0; \ list=`for p in $$list; do echo "$$p"; done | sed 's/$(EXEEXT)$$//'`; \ echo " rm -f" $$list; \ rm -f $$list aarch64/run$(EXEEXT): $(aarch64_run_OBJECTS) $(aarch64_run_DEPENDENCIES) $(EXTRA_aarch64_run_DEPENDENCIES) aarch64/$(am__dirstamp) @rm -f aarch64/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(aarch64_run_OBJECTS) $(aarch64_run_LDADD) $(LIBS) arm/run$(EXEEXT): $(arm_run_OBJECTS) $(arm_run_DEPENDENCIES) $(EXTRA_arm_run_DEPENDENCIES) arm/$(am__dirstamp) @rm -f arm/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(arm_run_OBJECTS) $(arm_run_LDADD) $(LIBS) avr/run$(EXEEXT): $(avr_run_OBJECTS) $(avr_run_DEPENDENCIES) $(EXTRA_avr_run_DEPENDENCIES) avr/$(am__dirstamp) @rm -f avr/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(avr_run_OBJECTS) $(avr_run_LDADD) $(LIBS) bfin/run$(EXEEXT): $(bfin_run_OBJECTS) $(bfin_run_DEPENDENCIES) $(EXTRA_bfin_run_DEPENDENCIES) bfin/$(am__dirstamp) @rm -f bfin/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(bfin_run_OBJECTS) $(bfin_run_LDADD) $(LIBS) bpf/run$(EXEEXT): $(bpf_run_OBJECTS) $(bpf_run_DEPENDENCIES) $(EXTRA_bpf_run_DEPENDENCIES) bpf/$(am__dirstamp) @rm -f bpf/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(bpf_run_OBJECTS) $(bpf_run_LDADD) $(LIBS) cr16/gencode.$(OBJEXT): cr16/$(am__dirstamp) \ cr16/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_cr16_FALSE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) $(EXTRA_cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp) @SIM_ENABLE_ARCH_cr16_FALSE@ @rm -f cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_cr16_FALSE@ $(AM_V_CCLD)$(LINK) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) $(LIBS) cr16/run$(EXEEXT): $(cr16_run_OBJECTS) $(cr16_run_DEPENDENCIES) $(EXTRA_cr16_run_DEPENDENCIES) cr16/$(am__dirstamp) @rm -f cr16/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(cr16_run_OBJECTS) $(cr16_run_LDADD) $(LIBS) cris/run$(EXEEXT): $(cris_run_OBJECTS) $(cris_run_DEPENDENCIES) $(EXTRA_cris_run_DEPENDENCIES) cris/$(am__dirstamp) @rm -f cris/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(cris_run_OBJECTS) $(cris_run_LDADD) $(LIBS) cris/rvdummy.$(OBJEXT): cris/$(am__dirstamp) \ cris/$(DEPDIR)/$(am__dirstamp) cris/rvdummy$(EXEEXT): $(cris_rvdummy_OBJECTS) $(cris_rvdummy_DEPENDENCIES) $(EXTRA_cris_rvdummy_DEPENDENCIES) cris/$(am__dirstamp) @rm -f cris/rvdummy$(EXEEXT) $(AM_V_CCLD)$(LINK) $(cris_rvdummy_OBJECTS) $(cris_rvdummy_LDADD) $(LIBS) d10v/gencode.$(OBJEXT): d10v/$(am__dirstamp) \ d10v/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_d10v_FALSE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) $(EXTRA_d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp) @SIM_ENABLE_ARCH_d10v_FALSE@ @rm -f d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_FALSE@ $(AM_V_CCLD)$(LINK) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) $(LIBS) d10v/run$(EXEEXT): $(d10v_run_OBJECTS) $(d10v_run_DEPENDENCIES) $(EXTRA_d10v_run_DEPENDENCIES) d10v/$(am__dirstamp) @rm -f d10v/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(d10v_run_OBJECTS) $(d10v_run_LDADD) $(LIBS) erc32/run$(EXEEXT): $(erc32_run_OBJECTS) $(erc32_run_DEPENDENCIES) $(EXTRA_erc32_run_DEPENDENCIES) erc32/$(am__dirstamp) @rm -f erc32/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(erc32_run_OBJECTS) $(erc32_run_LDADD) $(LIBS) erc32/sis.$(OBJEXT): erc32/$(am__dirstamp) \ erc32/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_erc32_FALSE@erc32/sis$(EXEEXT): $(erc32_sis_OBJECTS) $(erc32_sis_DEPENDENCIES) $(EXTRA_erc32_sis_DEPENDENCIES) erc32/$(am__dirstamp) @SIM_ENABLE_ARCH_erc32_FALSE@ @rm -f erc32/sis$(EXEEXT) @SIM_ENABLE_ARCH_erc32_FALSE@ $(AM_V_CCLD)$(LINK) $(erc32_sis_OBJECTS) $(erc32_sis_LDADD) $(LIBS) example-synacor/run$(EXEEXT): $(example_synacor_run_OBJECTS) $(example_synacor_run_DEPENDENCIES) $(EXTRA_example_synacor_run_DEPENDENCIES) example-synacor/$(am__dirstamp) @rm -f example-synacor/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(example_synacor_run_OBJECTS) $(example_synacor_run_LDADD) $(LIBS) frv/run$(EXEEXT): $(frv_run_OBJECTS) $(frv_run_DEPENDENCIES) $(EXTRA_frv_run_DEPENDENCIES) frv/$(am__dirstamp) @rm -f frv/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(frv_run_OBJECTS) $(frv_run_LDADD) $(LIBS) ft32/run$(EXEEXT): $(ft32_run_OBJECTS) $(ft32_run_DEPENDENCIES) $(EXTRA_ft32_run_DEPENDENCIES) ft32/$(am__dirstamp) @rm -f ft32/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(ft32_run_OBJECTS) $(ft32_run_LDADD) $(LIBS) h8300/run$(EXEEXT): $(h8300_run_OBJECTS) $(h8300_run_DEPENDENCIES) $(EXTRA_h8300_run_DEPENDENCIES) h8300/$(am__dirstamp) @rm -f h8300/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(h8300_run_OBJECTS) $(h8300_run_LDADD) $(LIBS) igen/filter$(EXEEXT): $(igen_filter_OBJECTS) $(igen_filter_DEPENDENCIES) $(EXTRA_igen_filter_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/filter$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_filter_OBJECTS) $(igen_filter_LDADD) $(LIBS) igen/gen$(EXEEXT): $(igen_gen_OBJECTS) $(igen_gen_DEPENDENCIES) $(EXTRA_igen_gen_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/gen$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_gen_OBJECTS) $(igen_gen_LDADD) $(LIBS) igen/igen.$(OBJEXT): igen/$(am__dirstamp) \ igen/$(DEPDIR)/$(am__dirstamp) igen/ld-cache$(EXEEXT): $(igen_ld_cache_OBJECTS) $(igen_ld_cache_DEPENDENCIES) $(EXTRA_igen_ld_cache_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/ld-cache$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_ld_cache_OBJECTS) $(igen_ld_cache_LDADD) $(LIBS) igen/ld-decode$(EXEEXT): $(igen_ld_decode_OBJECTS) $(igen_ld_decode_DEPENDENCIES) $(EXTRA_igen_ld_decode_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/ld-decode$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_ld_decode_OBJECTS) $(igen_ld_decode_LDADD) $(LIBS) igen/ld-insn$(EXEEXT): $(igen_ld_insn_OBJECTS) $(igen_ld_insn_DEPENDENCIES) $(EXTRA_igen_ld_insn_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/ld-insn$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_ld_insn_OBJECTS) $(igen_ld_insn_LDADD) $(LIBS) igen/table$(EXEEXT): $(igen_table_OBJECTS) $(igen_table_DEPENDENCIES) $(EXTRA_igen_table_DEPENDENCIES) igen/$(am__dirstamp) @rm -f igen/table$(EXEEXT) $(AM_V_CCLD)$(LINK) $(igen_table_OBJECTS) $(igen_table_LDADD) $(LIBS) iq2000/run$(EXEEXT): $(iq2000_run_OBJECTS) $(iq2000_run_DEPENDENCIES) $(EXTRA_iq2000_run_DEPENDENCIES) iq2000/$(am__dirstamp) @rm -f iq2000/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(iq2000_run_OBJECTS) $(iq2000_run_LDADD) $(LIBS) lm32/run$(EXEEXT): $(lm32_run_OBJECTS) $(lm32_run_DEPENDENCIES) $(EXTRA_lm32_run_DEPENDENCIES) lm32/$(am__dirstamp) @rm -f lm32/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(lm32_run_OBJECTS) $(lm32_run_LDADD) $(LIBS) m32c/opc2c.$(OBJEXT): m32c/$(am__dirstamp) \ m32c/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_m32c_FALSE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) $(EXTRA_m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp) @SIM_ENABLE_ARCH_m32c_FALSE@ @rm -f m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_FALSE@ $(AM_V_CCLD)$(LINK) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) $(LIBS) m32c/run$(EXEEXT): $(m32c_run_OBJECTS) $(m32c_run_DEPENDENCIES) $(EXTRA_m32c_run_DEPENDENCIES) m32c/$(am__dirstamp) @rm -f m32c/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(m32c_run_OBJECTS) $(m32c_run_LDADD) $(LIBS) m32r/run$(EXEEXT): $(m32r_run_OBJECTS) $(m32r_run_DEPENDENCIES) $(EXTRA_m32r_run_DEPENDENCIES) m32r/$(am__dirstamp) @rm -f m32r/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(m32r_run_OBJECTS) $(m32r_run_LDADD) $(LIBS) m68hc11/gencode.$(OBJEXT): m68hc11/$(am__dirstamp) \ m68hc11/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_m68hc11_FALSE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) $(EXTRA_m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp) @SIM_ENABLE_ARCH_m68hc11_FALSE@ @rm -f m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_FALSE@ $(AM_V_CCLD)$(LINK) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) $(LIBS) m68hc11/run$(EXEEXT): $(m68hc11_run_OBJECTS) $(m68hc11_run_DEPENDENCIES) $(EXTRA_m68hc11_run_DEPENDENCIES) m68hc11/$(am__dirstamp) @rm -f m68hc11/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(m68hc11_run_OBJECTS) $(m68hc11_run_LDADD) $(LIBS) mcore/run$(EXEEXT): $(mcore_run_OBJECTS) $(mcore_run_DEPENDENCIES) $(EXTRA_mcore_run_DEPENDENCIES) mcore/$(am__dirstamp) @rm -f mcore/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(mcore_run_OBJECTS) $(mcore_run_LDADD) $(LIBS) microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES) $(EXTRA_microblaze_run_DEPENDENCIES) microblaze/$(am__dirstamp) @rm -f microblaze/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(microblaze_run_OBJECTS) $(microblaze_run_LDADD) $(LIBS) mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp) @rm -f mips/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS) mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp) @rm -f mn10300/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(mn10300_run_OBJECTS) $(mn10300_run_LDADD) $(LIBS) moxie/run$(EXEEXT): $(moxie_run_OBJECTS) $(moxie_run_DEPENDENCIES) $(EXTRA_moxie_run_DEPENDENCIES) moxie/$(am__dirstamp) @rm -f moxie/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(moxie_run_OBJECTS) $(moxie_run_LDADD) $(LIBS) msp430/run$(EXEEXT): $(msp430_run_OBJECTS) $(msp430_run_DEPENDENCIES) $(EXTRA_msp430_run_DEPENDENCIES) msp430/$(am__dirstamp) @rm -f msp430/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(msp430_run_OBJECTS) $(msp430_run_LDADD) $(LIBS) or1k/run$(EXEEXT): $(or1k_run_OBJECTS) $(or1k_run_DEPENDENCIES) $(EXTRA_or1k_run_DEPENDENCIES) or1k/$(am__dirstamp) @rm -f or1k/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(or1k_run_OBJECTS) $(or1k_run_LDADD) $(LIBS) ppc/$(am__dirstamp): @$(MKDIR_P) ppc @: > ppc/$(am__dirstamp) ppc/run$(EXEEXT): $(ppc_run_OBJECTS) $(ppc_run_DEPENDENCIES) $(EXTRA_ppc_run_DEPENDENCIES) ppc/$(am__dirstamp) @rm -f ppc/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(ppc_run_OBJECTS) $(ppc_run_LDADD) $(LIBS) pru/run$(EXEEXT): $(pru_run_OBJECTS) $(pru_run_DEPENDENCIES) $(EXTRA_pru_run_DEPENDENCIES) pru/$(am__dirstamp) @rm -f pru/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(pru_run_OBJECTS) $(pru_run_LDADD) $(LIBS) riscv/run$(EXEEXT): $(riscv_run_OBJECTS) $(riscv_run_DEPENDENCIES) $(EXTRA_riscv_run_DEPENDENCIES) riscv/$(am__dirstamp) @rm -f riscv/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(riscv_run_OBJECTS) $(riscv_run_LDADD) $(LIBS) rl78/run$(EXEEXT): $(rl78_run_OBJECTS) $(rl78_run_DEPENDENCIES) $(EXTRA_rl78_run_DEPENDENCIES) rl78/$(am__dirstamp) @rm -f rl78/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(rl78_run_OBJECTS) $(rl78_run_LDADD) $(LIBS) rx/run$(EXEEXT): $(rx_run_OBJECTS) $(rx_run_DEPENDENCIES) $(EXTRA_rx_run_DEPENDENCIES) rx/$(am__dirstamp) @rm -f rx/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(rx_run_OBJECTS) $(rx_run_LDADD) $(LIBS) sh/gencode.$(OBJEXT): sh/$(am__dirstamp) sh/$(DEPDIR)/$(am__dirstamp) @SIM_ENABLE_ARCH_sh_FALSE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) $(EXTRA_sh_gencode_DEPENDENCIES) sh/$(am__dirstamp) @SIM_ENABLE_ARCH_sh_FALSE@ @rm -f sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_FALSE@ $(AM_V_CCLD)$(LINK) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) $(LIBS) sh/run$(EXEEXT): $(sh_run_OBJECTS) $(sh_run_DEPENDENCIES) $(EXTRA_sh_run_DEPENDENCIES) sh/$(am__dirstamp) @rm -f sh/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(sh_run_OBJECTS) $(sh_run_LDADD) $(LIBS) testsuite/common/$(am__dirstamp): @$(MKDIR_P) testsuite/common @: > testsuite/common/$(am__dirstamp) testsuite/common/$(DEPDIR)/$(am__dirstamp): @$(MKDIR_P) testsuite/common/$(DEPDIR) @: > testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/alu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/bits-gen.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/bits32m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/bits32m31.$(OBJEXT): \ testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/bits64m0.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/bits64m63.$(OBJEXT): \ testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) testsuite/common/fpu-tst.$(OBJEXT): testsuite/common/$(am__dirstamp) \ testsuite/common/$(DEPDIR)/$(am__dirstamp) v850/run$(EXEEXT): $(v850_run_OBJECTS) $(v850_run_DEPENDENCIES) $(EXTRA_v850_run_DEPENDENCIES) v850/$(am__dirstamp) @rm -f v850/run$(EXEEXT) $(AM_V_CCLD)$(LINK) $(v850_run_OBJECTS) $(v850_run_LDADD) $(LIBS) mostlyclean-compile: -rm -f *.$(OBJEXT) -rm -f aarch64/*.$(OBJEXT) -rm -f arm/*.$(OBJEXT) -rm -f avr/*.$(OBJEXT) -rm -f bfin/*.$(OBJEXT) -rm -f bpf/*.$(OBJEXT) -rm -f common/*.$(OBJEXT) -rm -f cr16/*.$(OBJEXT) -rm -f cris/*.$(OBJEXT) -rm -f d10v/*.$(OBJEXT) -rm -f erc32/*.$(OBJEXT) -rm -f example-synacor/*.$(OBJEXT) -rm -f frv/*.$(OBJEXT) -rm -f ft32/*.$(OBJEXT) -rm -f h8300/*.$(OBJEXT) -rm -f igen/*.$(OBJEXT) -rm -f iq2000/*.$(OBJEXT) -rm -f lm32/*.$(OBJEXT) -rm -f m32c/*.$(OBJEXT) -rm -f m32r/*.$(OBJEXT) -rm -f m68hc11/*.$(OBJEXT) -rm -f mcore/*.$(OBJEXT) -rm -f microblaze/*.$(OBJEXT) -rm -f mips/*.$(OBJEXT) -rm -f mn10300/*.$(OBJEXT) -rm -f moxie/*.$(OBJEXT) -rm -f msp430/*.$(OBJEXT) -rm -f or1k/*.$(OBJEXT) -rm -f pru/*.$(OBJEXT) -rm -f riscv/*.$(OBJEXT) -rm -f rl78/*.$(OBJEXT) -rm -f rx/*.$(OBJEXT) -rm -f sh/*.$(OBJEXT) -rm -f testsuite/common/*.$(OBJEXT) -rm -f v850/*.$(OBJEXT) distclean-compile: -rm -f *.tab.c @AMDEP_TRUE@@am__include@ @am__quote@aarch64/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@arm/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@avr/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@bfin/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@bpf/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/callback.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/portability.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/sim-load.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/sim-signal.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/syscall.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-errno.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-open.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-signal.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/target-newlib-syscall.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@common/$(DEPDIR)/version.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/gencode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@cr16/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@cris/$(DEPDIR)/rvdummy.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/gencode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@d10v/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@erc32/$(DEPDIR)/sis.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@example-synacor/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@frv/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@ft32/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@h8300/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/filter_host.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-engine.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-icache.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-idecode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-itable.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-model.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-semantics.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen-support.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/gen.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/igen.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-cache.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-decode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/ld-insn.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/lf.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/misc.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@igen/$(DEPDIR)/table.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@iq2000/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@lm32/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@m32c/$(DEPDIR)/opc2c.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@m32r/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/gencode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@m68hc11/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mcore/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@microblaze/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mips/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@mn10300/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@moxie/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@msp430/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@or1k/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@pru/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rl78/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@rx/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/gencode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@sh/$(DEPDIR)/modules.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/alu-tst.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits-gen.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m0.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits32m31.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m0.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/bits64m63.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@testsuite/common/$(DEPDIR)/fpu-tst.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@v850/$(DEPDIR)/modules.Po@am__quote@ .c.o: @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.o$$||'`;\ @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ $< .c.obj: @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.obj$$||'`;\ @am__fastdepCC_TRUE@ $(COMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ `$(CYGPATH_W) '$<'` &&\ @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Po @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=no @AMDEPBACKSLASH@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(COMPILE) -c -o $@ `$(CYGPATH_W) '$<'` .c.lo: @am__fastdepCC_TRUE@ $(AM_V_CC)depbase=`echo $@ | sed 's|[^/]*$$|$(DEPDIR)/&|;s|\.lo$$||'`;\ @am__fastdepCC_TRUE@ $(LTCOMPILE) -MT $@ -MD -MP -MF $$depbase.Tpo -c -o $@ $< &&\ @am__fastdepCC_TRUE@ $(am__mv) $$depbase.Tpo $$depbase.Plo @AMDEP_TRUE@@am__fastdepCC_FALSE@ $(AM_V_CC)source='$<' object='$@' libtool=yes @AMDEPBACKSLASH@ @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(LTCOMPILE) -c -o $@ $< mostlyclean-libtool: -rm -f *.lo clean-libtool: -rm -rf .libs _libs -rm -rf aarch64/.libs aarch64/_libs -rm -rf arm/.libs arm/_libs -rm -rf avr/.libs avr/_libs -rm -rf bfin/.libs bfin/_libs -rm -rf bpf/.libs bpf/_libs -rm -rf cr16/.libs cr16/_libs -rm -rf cris/.libs cris/_libs -rm -rf d10v/.libs d10v/_libs -rm -rf erc32/.libs erc32/_libs -rm -rf example-synacor/.libs example-synacor/_libs -rm -rf frv/.libs frv/_libs -rm -rf ft32/.libs ft32/_libs -rm -rf h8300/.libs h8300/_libs -rm -rf igen/.libs igen/_libs -rm -rf iq2000/.libs iq2000/_libs -rm -rf lm32/.libs lm32/_libs -rm -rf m32c/.libs m32c/_libs -rm -rf m32r/.libs m32r/_libs -rm -rf m68hc11/.libs m68hc11/_libs -rm -rf mcore/.libs mcore/_libs -rm -rf microblaze/.libs microblaze/_libs -rm -rf mips/.libs mips/_libs -rm -rf mn10300/.libs mn10300/_libs -rm -rf moxie/.libs moxie/_libs -rm -rf msp430/.libs msp430/_libs -rm -rf or1k/.libs or1k/_libs -rm -rf ppc/.libs ppc/_libs -rm -rf pru/.libs pru/_libs -rm -rf riscv/.libs riscv/_libs -rm -rf rl78/.libs rl78/_libs -rm -rf rx/.libs rx/_libs -rm -rf sh/.libs sh/_libs -rm -rf testsuite/common/.libs testsuite/common/_libs -rm -rf v850/.libs v850/_libs distclean-libtool: -rm -f libtool config.lt install-armdocDATA: $(armdoc_DATA) @$(NORMAL_INSTALL) @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(armdocdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(armdocdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(armdocdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(armdocdir)" || exit $$?; \ done uninstall-armdocDATA: @$(NORMAL_UNINSTALL) @list='$(armdoc_DATA)'; test -n "$(armdocdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(armdocdir)'; $(am__uninstall_files_from_dir) install-dtbDATA: $(dtb_DATA) @$(NORMAL_INSTALL) @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(dtbdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(dtbdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(dtbdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(dtbdir)" || exit $$?; \ done uninstall-dtbDATA: @$(NORMAL_UNINSTALL) @list='$(dtb_DATA)'; test -n "$(dtbdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(dtbdir)'; $(am__uninstall_files_from_dir) install-erc32docDATA: $(erc32doc_DATA) @$(NORMAL_INSTALL) @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(erc32docdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(erc32docdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(erc32docdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(erc32docdir)" || exit $$?; \ done uninstall-erc32docDATA: @$(NORMAL_UNINSTALL) @list='$(erc32doc_DATA)'; test -n "$(erc32docdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(erc32docdir)'; $(am__uninstall_files_from_dir) install-frvdocDATA: $(frvdoc_DATA) @$(NORMAL_INSTALL) @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(frvdocdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(frvdocdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(frvdocdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(frvdocdir)" || exit $$?; \ done uninstall-frvdocDATA: @$(NORMAL_UNINSTALL) @list='$(frvdoc_DATA)'; test -n "$(frvdocdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(frvdocdir)'; $(am__uninstall_files_from_dir) install-or1kdocDATA: $(or1kdoc_DATA) @$(NORMAL_INSTALL) @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(or1kdocdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(or1kdocdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(or1kdocdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(or1kdocdir)" || exit $$?; \ done uninstall-or1kdocDATA: @$(NORMAL_UNINSTALL) @list='$(or1kdoc_DATA)'; test -n "$(or1kdocdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(or1kdocdir)'; $(am__uninstall_files_from_dir) install-ppcdocDATA: $(ppcdoc_DATA) @$(NORMAL_INSTALL) @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(ppcdocdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(ppcdocdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(ppcdocdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(ppcdocdir)" || exit $$?; \ done uninstall-ppcdocDATA: @$(NORMAL_UNINSTALL) @list='$(ppcdoc_DATA)'; test -n "$(ppcdocdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(ppcdocdir)'; $(am__uninstall_files_from_dir) install-rxdocDATA: $(rxdoc_DATA) @$(NORMAL_INSTALL) @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(rxdocdir)'"; \ $(MKDIR_P) "$(DESTDIR)$(rxdocdir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_DATA) $$files '$(DESTDIR)$(rxdocdir)'"; \ $(INSTALL_DATA) $$files "$(DESTDIR)$(rxdocdir)" || exit $$?; \ done uninstall-rxdocDATA: @$(NORMAL_UNINSTALL) @list='$(rxdoc_DATA)'; test -n "$(rxdocdir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(rxdocdir)'; $(am__uninstall_files_from_dir) install-pkgincludeHEADERS: $(pkginclude_HEADERS) @$(NORMAL_INSTALL) @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \ if test -n "$$list"; then \ echo " $(MKDIR_P) '$(DESTDIR)$(pkgincludedir)'"; \ $(MKDIR_P) "$(DESTDIR)$(pkgincludedir)" || exit 1; \ fi; \ for p in $$list; do \ if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ echo "$$d$$p"; \ done | $(am__base_list) | \ while read files; do \ echo " $(INSTALL_HEADER) $$files '$(DESTDIR)$(pkgincludedir)'"; \ $(INSTALL_HEADER) $$files "$(DESTDIR)$(pkgincludedir)" || exit $$?; \ done uninstall-pkgincludeHEADERS: @$(NORMAL_UNINSTALL) @list='$(pkginclude_HEADERS)'; test -n "$(pkgincludedir)" || list=; \ files=`for p in $$list; do echo $$p; done | sed -e 's|^.*/||'`; \ dir='$(DESTDIR)$(pkgincludedir)'; $(am__uninstall_files_from_dir) # This directory's subdirectories are mostly independent; you can cd # into them and run 'make' without going through this Makefile. # To change the values of 'make' variables: instead of editing Makefiles, # (1) if the variable is set in 'config.status', edit 'config.status' # (which will cause the Makefiles to be regenerated when you run 'make'); # (2) otherwise, pass the desired values on the 'make' command line. $(am__recursive_targets): @fail=; \ if $(am__make_keepgoing); then \ failcom='fail=yes'; \ else \ failcom='exit 1'; \ fi; \ dot_seen=no; \ target=`echo $@ | sed s/-recursive//`; \ case "$@" in \ distclean-* | maintainer-clean-*) list='$(DIST_SUBDIRS)' ;; \ *) list='$(SUBDIRS)' ;; \ esac; \ for subdir in $$list; do \ echo "Making $$target in $$subdir"; \ if test "$$subdir" = "."; then \ dot_seen=yes; \ local_target="$$target-am"; \ else \ local_target="$$target"; \ fi; \ ($(am__cd) $$subdir && $(MAKE) $(AM_MAKEFLAGS) $$local_target) \ || eval $$failcom; \ done; \ if test "$$dot_seen" = "no"; then \ $(MAKE) $(AM_MAKEFLAGS) "$$target-am" || exit 1; \ fi; test -z "$$fail" ID: $(am__tagged_files) $(am__define_uniq_tagged_files); mkid -fID $$unique tags: tags-recursive TAGS: tags tags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files) set x; \ here=`pwd`; \ if ($(ETAGS) --etags-include --version) >/dev/null 2>&1; then \ include_option=--etags-include; \ empty_fix=.; \ else \ include_option=--include; \ empty_fix=; \ fi; \ list='$(SUBDIRS)'; for subdir in $$list; do \ if test "$$subdir" = .; then :; else \ test ! -f $$subdir/TAGS || \ set "$$@" "$$include_option=$$here/$$subdir/TAGS"; \ fi; \ done; \ $(am__define_uniq_tagged_files); \ shift; \ if test -z "$(ETAGS_ARGS)$$*$$unique"; then :; else \ test -n "$$unique" || unique=$$empty_fix; \ if test $$# -gt 0; then \ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \ "$$@" $$unique; \ else \ $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \ $$unique; \ fi; \ fi ctags: ctags-recursive CTAGS: ctags ctags-am: $(TAGS_DEPENDENCIES) $(am__tagged_files) $(am__define_uniq_tagged_files); \ test -z "$(CTAGS_ARGS)$$unique" \ || $(CTAGS) $(CTAGSFLAGS) $(AM_CTAGSFLAGS) $(CTAGS_ARGS) \ $$unique GTAGS: here=`$(am__cd) $(top_builddir) && pwd` \ && $(am__cd) $(top_srcdir) \ && gtags -i $(GTAGS_ARGS) "$$here" cscope: cscope.files test ! -s cscope.files \ || $(CSCOPE) -b -q $(AM_CSCOPEFLAGS) $(CSCOPEFLAGS) -i cscope.files $(CSCOPE_ARGS) clean-cscope: -rm -f cscope.files cscope.files: clean-cscope cscopelist cscopelist: cscopelist-recursive cscopelist-am: $(am__tagged_files) list='$(am__tagged_files)'; \ case "$(srcdir)" in \ [\\/]* | ?:[\\/]*) sdir="$(srcdir)" ;; \ *) sdir=$(subdir)/$(srcdir) ;; \ esac; \ for i in $$list; do \ if test -f "$$i"; then \ echo "$(subdir)/$$i"; \ else \ echo "$$sdir/$$i"; \ fi; \ done >> $(top_builddir)/cscope.files distclean-tags: -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -rm -f cscope.out cscope.in.out cscope.po.out cscope.files site.exp: Makefile $(EXTRA_DEJAGNU_SITE_CONFIG) @echo 'Making a new site.exp file ...' @echo '## these variables are automatically generated by make ##' >site.tmp @echo '# Do not edit here. If you wish to override these values' >>site.tmp @echo '# edit the last section' >>site.tmp @echo 'set srcdir "$(srcdir)"' >>site.tmp @echo "set objdir `pwd`" >>site.tmp @echo 'set build_alias "$(build_alias)"' >>site.tmp @echo 'set build_triplet $(build_triplet)' >>site.tmp @echo 'set host_alias "$(host_alias)"' >>site.tmp @echo 'set host_triplet $(host_triplet)' >>site.tmp @echo 'set target_alias "$(target_alias)"' >>site.tmp @echo 'set target_triplet $(target_triplet)' >>site.tmp @list='$(EXTRA_DEJAGNU_SITE_CONFIG)'; for f in $$list; do \ echo "## Begin content included from file $$f. Do not modify. ##" \ && cat `test -f "$$f" || echo '$(srcdir)/'`$$f \ && echo "## End content included from file $$f. ##" \ || exit 1; \ done >> site.tmp @echo "## End of auto-generated content; you can edit from here. ##" >> site.tmp @if test -f site.exp; then \ sed -e '1,/^## End of auto-generated content.*##/d' site.exp >> site.tmp; \ fi @-rm -f site.bak @test ! -f site.exp || mv site.exp site.bak @mv site.tmp site.exp distclean-DEJAGNU: -rm -f site.exp site.bak -l='$(DEJATOOL)'; for tool in $$l; do \ rm -f $$tool.sum $$tool.log; \ done # Recover from deleted '.trs' file; this should ensure that # "rm -f foo.log; make foo.trs" re-run 'foo.test', and re-create # both 'foo.log' and 'foo.trs'. Break the recipe in two subshells # to avoid problems with "make -n". .log.trs: rm -f $< $@ $(MAKE) $(AM_MAKEFLAGS) $< # Leading 'am--fnord' is there to ensure the list of targets does not # expand to empty, as could happen e.g. with make check TESTS=''. am--fnord $(TEST_LOGS) $(TEST_LOGS:.log=.trs): $(am__force_recheck) am--force-recheck: @: $(TEST_SUITE_LOG): $(TEST_LOGS) @$(am__set_TESTS_bases); \ am__f_ok () { test -f "$$1" && test -r "$$1"; }; \ redo_bases=`for i in $$bases; do \ am__f_ok $$i.trs && am__f_ok $$i.log || echo $$i; \ done`; \ if test -n "$$redo_bases"; then \ redo_logs=`for i in $$redo_bases; do echo $$i.log; done`; \ redo_results=`for i in $$redo_bases; do echo $$i.trs; done`; \ if $(am__make_dryrun); then :; else \ rm -f $$redo_logs && rm -f $$redo_results || exit 1; \ fi; \ fi; \ if test -n "$$am__remaking_logs"; then \ echo "fatal: making $(TEST_SUITE_LOG): possible infinite" \ "recursion detected" >&2; \ elif test -n "$$redo_logs"; then \ am__remaking_logs=yes $(MAKE) $(AM_MAKEFLAGS) $$redo_logs; \ fi; \ if $(am__make_dryrun); then :; else \ st=0; \ errmsg="fatal: making $(TEST_SUITE_LOG): failed to create"; \ for i in $$redo_bases; do \ test -f $$i.trs && test -r $$i.trs \ || { echo "$$errmsg $$i.trs" >&2; st=1; }; \ test -f $$i.log && test -r $$i.log \ || { echo "$$errmsg $$i.log" >&2; st=1; }; \ done; \ test $$st -eq 0 || exit 1; \ fi @$(am__sh_e_setup); $(am__tty_colors); $(am__set_TESTS_bases); \ ws='[ ]'; \ results=`for b in $$bases; do echo $$b.trs; done`; \ test -n "$$results" || results=/dev/null; \ all=` grep "^$$ws*:test-result:" $$results | wc -l`; \ pass=` grep "^$$ws*:test-result:$$ws*PASS" $$results | wc -l`; \ fail=` grep "^$$ws*:test-result:$$ws*FAIL" $$results | wc -l`; \ skip=` grep "^$$ws*:test-result:$$ws*SKIP" $$results | wc -l`; \ xfail=`grep "^$$ws*:test-result:$$ws*XFAIL" $$results | wc -l`; \ xpass=`grep "^$$ws*:test-result:$$ws*XPASS" $$results | wc -l`; \ error=`grep "^$$ws*:test-result:$$ws*ERROR" $$results | wc -l`; \ if test `expr $$fail + $$xpass + $$error` -eq 0; then \ success=true; \ else \ success=false; \ fi; \ br='==================='; br=$$br$$br$$br$$br; \ result_count () \ { \ if test x"$$1" = x"--maybe-color"; then \ maybe_colorize=yes; \ elif test x"$$1" = x"--no-color"; then \ maybe_colorize=no; \ else \ echo "$@: invalid 'result_count' usage" >&2; exit 4; \ fi; \ shift; \ desc=$$1 count=$$2; \ if test $$maybe_colorize = yes && test $$count -gt 0; then \ color_start=$$3 color_end=$$std; \ else \ color_start= color_end=; \ fi; \ echo "$${color_start}# $$desc $$count$${color_end}"; \ }; \ create_testsuite_report () \ { \ result_count $$1 "TOTAL:" $$all "$$brg"; \ result_count $$1 "PASS: " $$pass "$$grn"; \ result_count $$1 "SKIP: " $$skip "$$blu"; \ result_count $$1 "XFAIL:" $$xfail "$$lgn"; \ result_count $$1 "FAIL: " $$fail "$$red"; \ result_count $$1 "XPASS:" $$xpass "$$red"; \ result_count $$1 "ERROR:" $$error "$$mgn"; \ }; \ { \ echo "$(PACKAGE_STRING): $(subdir)/$(TEST_SUITE_LOG)" | \ $(am__rst_title); \ create_testsuite_report --no-color; \ echo; \ echo ".. contents:: :depth: 2"; \ echo; \ for b in $$bases; do echo $$b; done \ | $(am__create_global_log); \ } >$(TEST_SUITE_LOG).tmp || exit 1; \ mv $(TEST_SUITE_LOG).tmp $(TEST_SUITE_LOG); \ if $$success; then \ col="$$grn"; \ else \ col="$$red"; \ test x"$$VERBOSE" = x || cat $(TEST_SUITE_LOG); \ fi; \ echo "$${col}$$br$${std}"; \ echo "$${col}Testsuite summary for $(PACKAGE_STRING)$${std}"; \ echo "$${col}$$br$${std}"; \ create_testsuite_report --maybe-color; \ echo "$$col$$br$$std"; \ if $$success; then :; else \ echo "$${col}See $(subdir)/$(TEST_SUITE_LOG)$${std}"; \ if test -n "$(PACKAGE_BUGREPORT)"; then \ echo "$${col}Please report to $(PACKAGE_BUGREPORT)$${std}"; \ fi; \ echo "$$col$$br$$std"; \ fi; \ $$success || exit 1 check-TESTS: @list='$(RECHECK_LOGS)'; test -z "$$list" || rm -f $$list @list='$(RECHECK_LOGS:.log=.trs)'; test -z "$$list" || rm -f $$list @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG) @set +e; $(am__set_TESTS_bases); \ log_list=`for i in $$bases; do echo $$i.log; done`; \ trs_list=`for i in $$bases; do echo $$i.trs; done`; \ log_list=`echo $$log_list`; trs_list=`echo $$trs_list`; \ $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) TEST_LOGS="$$log_list"; \ exit $$?; recheck: all $(check_PROGRAMS) @test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG) @set +e; $(am__set_TESTS_bases); \ bases=`for i in $$bases; do echo $$i; done \ | $(am__list_recheck_tests)` || exit 1; \ log_list=`for i in $$bases; do echo $$i.log; done`; \ log_list=`echo $$log_list`; \ $(MAKE) $(AM_MAKEFLAGS) $(TEST_SUITE_LOG) \ am__force_recheck=am--force-recheck \ TEST_LOGS="$$log_list"; \ exit $$? testsuite/common/bits32m0.log: testsuite/common/bits32m0$(EXEEXT) @p='testsuite/common/bits32m0$(EXEEXT)'; \ b='testsuite/common/bits32m0'; \ $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) testsuite/common/bits32m31.log: testsuite/common/bits32m31$(EXEEXT) @p='testsuite/common/bits32m31$(EXEEXT)'; \ b='testsuite/common/bits32m31'; \ $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) testsuite/common/bits64m0.log: testsuite/common/bits64m0$(EXEEXT) @p='testsuite/common/bits64m0$(EXEEXT)'; \ b='testsuite/common/bits64m0'; \ $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) testsuite/common/bits64m63.log: testsuite/common/bits64m63$(EXEEXT) @p='testsuite/common/bits64m63$(EXEEXT)'; \ b='testsuite/common/bits64m63'; \ $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) testsuite/common/alu-tst.log: testsuite/common/alu-tst$(EXEEXT) @p='testsuite/common/alu-tst$(EXEEXT)'; \ b='testsuite/common/alu-tst'; \ $(am__check_pre) $(LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_LOG_DRIVER_FLAGS) $(LOG_DRIVER_FLAGS) -- $(LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) .test.log: @p='$<'; \ $(am__set_b); \ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \ --log-file $$b.log --trs-file $$b.trs \ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \ "$$tst" $(AM_TESTS_FD_REDIRECT) @am__EXEEXT_TRUE@.test$(EXEEXT).log: @am__EXEEXT_TRUE@ @p='$<'; \ @am__EXEEXT_TRUE@ $(am__set_b); \ @am__EXEEXT_TRUE@ $(am__check_pre) $(TEST_LOG_DRIVER) --test-name "$$f" \ @am__EXEEXT_TRUE@ --log-file $$b.log --trs-file $$b.trs \ @am__EXEEXT_TRUE@ $(am__common_driver_flags) $(AM_TEST_LOG_DRIVER_FLAGS) $(TEST_LOG_DRIVER_FLAGS) -- $(TEST_LOG_COMPILE) \ @am__EXEEXT_TRUE@ "$$tst" $(AM_TESTS_FD_REDIRECT) check-am: all-am $(MAKE) $(AM_MAKEFLAGS) $(check_PROGRAMS) $(MAKE) $(AM_MAKEFLAGS) check-DEJAGNU check-TESTS check: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) check-recursive all-am: Makefile $(LIBRARIES) $(PROGRAMS) $(DATA) $(HEADERS) config.h installdirs: installdirs-recursive installdirs-am: for dir in "$(DESTDIR)$(armdocdir)" "$(DESTDIR)$(dtbdir)" "$(DESTDIR)$(erc32docdir)" "$(DESTDIR)$(frvdocdir)" "$(DESTDIR)$(or1kdocdir)" "$(DESTDIR)$(ppcdocdir)" "$(DESTDIR)$(rxdocdir)" "$(DESTDIR)$(pkgincludedir)"; do \ test -z "$$dir" || $(MKDIR_P) "$$dir"; \ done install: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) install-recursive install-exec: install-exec-recursive install-data: install-data-recursive uninstall: uninstall-recursive install-am: all-am @$(MAKE) $(AM_MAKEFLAGS) install-exec-am install-data-am installcheck: installcheck-recursive install-strip: if test -z '$(STRIP)'; then \ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ install; \ else \ $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'" install; \ fi mostlyclean-generic: -test -z "$(MOSTLYCLEANFILES)" || rm -f $(MOSTLYCLEANFILES) -test -z "$(TEST_LOGS)" || rm -f $(TEST_LOGS) -test -z "$(TEST_LOGS:.log=.trs)" || rm -f $(TEST_LOGS:.log=.trs) -test -z "$(TEST_SUITE_LOG)" || rm -f $(TEST_SUITE_LOG) clean-generic: -test -z "$(CLEANFILES)" || rm -f $(CLEANFILES) distclean-generic: -test -z "$(CONFIG_CLEAN_FILES)" || rm -f $(CONFIG_CLEAN_FILES) -test . = "$(srcdir)" || test -z "$(CONFIG_CLEAN_VPATH_FILES)" || rm -f $(CONFIG_CLEAN_VPATH_FILES) -rm -f aarch64/$(DEPDIR)/$(am__dirstamp) -rm -f aarch64/$(am__dirstamp) -rm -f arm/$(DEPDIR)/$(am__dirstamp) -rm -f arm/$(am__dirstamp) -rm -f avr/$(DEPDIR)/$(am__dirstamp) -rm -f avr/$(am__dirstamp) -rm -f bfin/$(DEPDIR)/$(am__dirstamp) -rm -f bfin/$(am__dirstamp) -rm -f bpf/$(DEPDIR)/$(am__dirstamp) -rm -f bpf/$(am__dirstamp) -rm -f common/$(DEPDIR)/$(am__dirstamp) -rm -f common/$(am__dirstamp) -rm -f cr16/$(DEPDIR)/$(am__dirstamp) -rm -f cr16/$(am__dirstamp) -rm -f cris/$(DEPDIR)/$(am__dirstamp) -rm -f cris/$(am__dirstamp) -rm -f d10v/$(DEPDIR)/$(am__dirstamp) -rm -f d10v/$(am__dirstamp) -rm -f erc32/$(DEPDIR)/$(am__dirstamp) -rm -f erc32/$(am__dirstamp) -rm -f example-synacor/$(DEPDIR)/$(am__dirstamp) -rm -f example-synacor/$(am__dirstamp) -rm -f frv/$(DEPDIR)/$(am__dirstamp) -rm -f frv/$(am__dirstamp) -rm -f ft32/$(DEPDIR)/$(am__dirstamp) -rm -f ft32/$(am__dirstamp) -rm -f h8300/$(DEPDIR)/$(am__dirstamp) -rm -f h8300/$(am__dirstamp) -rm -f igen/$(DEPDIR)/$(am__dirstamp) -rm -f igen/$(am__dirstamp) -rm -f iq2000/$(DEPDIR)/$(am__dirstamp) -rm -f iq2000/$(am__dirstamp) -rm -f lm32/$(DEPDIR)/$(am__dirstamp) -rm -f lm32/$(am__dirstamp) -rm -f m32c/$(DEPDIR)/$(am__dirstamp) -rm -f m32c/$(am__dirstamp) -rm -f m32r/$(DEPDIR)/$(am__dirstamp) -rm -f m32r/$(am__dirstamp) -rm -f m68hc11/$(DEPDIR)/$(am__dirstamp) -rm -f m68hc11/$(am__dirstamp) -rm -f mcore/$(DEPDIR)/$(am__dirstamp) -rm -f mcore/$(am__dirstamp) -rm -f microblaze/$(DEPDIR)/$(am__dirstamp) -rm -f microblaze/$(am__dirstamp) -rm -f mips/$(DEPDIR)/$(am__dirstamp) -rm -f mips/$(am__dirstamp) -rm -f mn10300/$(DEPDIR)/$(am__dirstamp) -rm -f mn10300/$(am__dirstamp) -rm -f moxie/$(DEPDIR)/$(am__dirstamp) -rm -f moxie/$(am__dirstamp) -rm -f msp430/$(DEPDIR)/$(am__dirstamp) -rm -f msp430/$(am__dirstamp) -rm -f or1k/$(DEPDIR)/$(am__dirstamp) -rm -f or1k/$(am__dirstamp) -rm -f ppc/$(am__dirstamp) -rm -f pru/$(DEPDIR)/$(am__dirstamp) -rm -f pru/$(am__dirstamp) -rm -f riscv/$(DEPDIR)/$(am__dirstamp) -rm -f riscv/$(am__dirstamp) -rm -f rl78/$(DEPDIR)/$(am__dirstamp) -rm -f rl78/$(am__dirstamp) -rm -f rx/$(DEPDIR)/$(am__dirstamp) -rm -f rx/$(am__dirstamp) -rm -f sh/$(DEPDIR)/$(am__dirstamp) -rm -f sh/$(am__dirstamp) -rm -f testsuite/common/$(DEPDIR)/$(am__dirstamp) -rm -f testsuite/common/$(am__dirstamp) -rm -f v850/$(DEPDIR)/$(am__dirstamp) -rm -f v850/$(am__dirstamp) -test -z "$(DISTCLEANFILES)" || rm -f $(DISTCLEANFILES) maintainer-clean-generic: @echo "This command is intended for maintainers to use" @echo "it deletes files that may require special tools to rebuild." -test -z "$(BUILT_SOURCES)" || rm -f $(BUILT_SOURCES) clean: clean-recursive clean-am: clean-checkPROGRAMS clean-generic clean-libtool \ clean-noinstLIBRARIES clean-noinstPROGRAMS mostlyclean-am distclean: distclean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR) -rm -f Makefile distclean-am: clean-am distclean-DEJAGNU distclean-compile \ distclean-generic distclean-hdr distclean-libtool \ distclean-tags dvi: dvi-recursive dvi-am: html: html-recursive html-am: info: info-recursive info-am: install-data-am: install-armdocDATA install-data-local install-dtbDATA \ install-erc32docDATA install-frvdocDATA install-or1kdocDATA \ install-pkgincludeHEADERS install-ppcdocDATA install-rxdocDATA install-dvi: install-dvi-recursive install-dvi-am: install-exec-am: install-exec-local install-html: install-html-recursive install-html-am: install-info: install-info-recursive install-info-am: install-man: install-pdf: install-pdf-recursive install-pdf-am: install-ps: install-ps-recursive install-ps-am: installcheck-am: maintainer-clean: maintainer-clean-recursive -rm -f $(am__CONFIG_DISTCLEAN_FILES) -rm -rf $(top_srcdir)/autom4te.cache -rm -rf aarch64/$(DEPDIR) arm/$(DEPDIR) avr/$(DEPDIR) bfin/$(DEPDIR) bpf/$(DEPDIR) common/$(DEPDIR) cr16/$(DEPDIR) cris/$(DEPDIR) d10v/$(DEPDIR) erc32/$(DEPDIR) example-synacor/$(DEPDIR) frv/$(DEPDIR) ft32/$(DEPDIR) h8300/$(DEPDIR) igen/$(DEPDIR) iq2000/$(DEPDIR) lm32/$(DEPDIR) m32c/$(DEPDIR) m32r/$(DEPDIR) m68hc11/$(DEPDIR) mcore/$(DEPDIR) microblaze/$(DEPDIR) mips/$(DEPDIR) mn10300/$(DEPDIR) moxie/$(DEPDIR) msp430/$(DEPDIR) or1k/$(DEPDIR) pru/$(DEPDIR) riscv/$(DEPDIR) rl78/$(DEPDIR) rx/$(DEPDIR) sh/$(DEPDIR) testsuite/common/$(DEPDIR) v850/$(DEPDIR) -rm -f Makefile maintainer-clean-am: distclean-am maintainer-clean-generic mostlyclean: mostlyclean-recursive mostlyclean-am: mostlyclean-compile mostlyclean-generic \ mostlyclean-libtool pdf: pdf-recursive pdf-am: ps: ps-recursive ps-am: uninstall-am: uninstall-armdocDATA uninstall-dtbDATA \ uninstall-erc32docDATA uninstall-frvdocDATA uninstall-local \ uninstall-or1kdocDATA uninstall-pkgincludeHEADERS \ uninstall-ppcdocDATA uninstall-rxdocDATA .MAKE: $(am__recursive_targets) all check check-am install install-am \ install-strip .PHONY: $(am__recursive_targets) CTAGS GTAGS TAGS all all-am \ am--refresh check check-DEJAGNU check-TESTS check-am clean \ clean-checkPROGRAMS clean-cscope clean-generic clean-libtool \ clean-noinstLIBRARIES clean-noinstPROGRAMS cscope \ cscopelist-am ctags ctags-am distclean distclean-DEJAGNU \ distclean-compile distclean-generic distclean-hdr \ distclean-libtool distclean-tags dvi dvi-am html html-am info \ info-am install install-am install-armdocDATA install-data \ install-data-am install-data-local install-dtbDATA install-dvi \ install-dvi-am install-erc32docDATA install-exec \ install-exec-am install-exec-local install-frvdocDATA \ install-html install-html-am install-info install-info-am \ install-man install-or1kdocDATA install-pdf install-pdf-am \ install-pkgincludeHEADERS install-ppcdocDATA install-ps \ install-ps-am install-rxdocDATA install-strip installcheck \ installcheck-am installdirs installdirs-am maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ recheck tags tags-am uninstall uninstall-am \ uninstall-armdocDATA uninstall-dtbDATA uninstall-erc32docDATA \ uninstall-frvdocDATA uninstall-local uninstall-or1kdocDATA \ uninstall-pkgincludeHEADERS uninstall-ppcdocDATA \ uninstall-rxdocDATA .PRECIOUS: Makefile @am__include@ @am__quote@$(GNULIB_PARENT_DIR)/gnulib/Makefile.gnulib.inc@am__quote@ # Generate target constants for newlib/libgloss from its source tree. # This file is shipped with distributions so we build in the source dir. # Use `make nltvals' to rebuild. .PHONY: nltvals nltvals: $(srccom)/gennltvals.py --cpp "$(CPP)" common/version.c: common/version.c-stamp ; @true common/version.c-stamp: $(srcroot)/gdb/version.in $(srcroot)/bfd/version.h $(srcdir)/common/create-version.sh $(AM_V_GEN)$(SHELL) $(srcdir)/common/create-version.sh $(srcroot)/gdb $@.tmp $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(@:-stamp=) $(AM_V_at)touch $@ .PRECIOUS: %/test-hw-events.o %/test-hw-events.o: common/hw-events.c $(AM_V_CC)$(COMPILE) -DMAIN -c -o $@ $< %/test-hw-events: %/test-hw-events.o %/libsim.a $(AM_V_CCLD)$(LINK) -o $@ $^ $(SIM_COMMON_LIBS) $(LIBS) # FIXME This is one very simple-minded way of generating the file hw-config.h. %/hw-config.h: %/stamp-hw ; @true %/stamp-hw: Makefile $(AM_V_GEN)set -e; \ ( \ sim_hw="$(SIM_HW_DEVICES) $($(@D)_SIM_EXTRA_HW_DEVICES)" ; \ echo "/* generated by Makefile */" ; \ printf "extern const struct hw_descriptor dv_%s_descriptor[];\n" $$sim_hw ; \ echo "const struct hw_descriptor * const hw_descriptors[] = {" ; \ printf " dv_%s_descriptor,\n" $$sim_hw ; \ echo " NULL," ; \ echo "};" \ ) > $@.tmp; \ $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/hw-config.h; \ touch $@ .PRECIOUS: %/stamp-hw %/modules.c: %/stamp-modules ; @true %/stamp-modules: Makefile $(AM_V_GEN)set -e; \ LANG=C ; export LANG; \ LC_ALL=C ; export LC_ALL; \ sed -n -e '/^sim_install_/{s/^\(sim_install_[a-z_0-9A-Z]*\).*/\1/;p}' $(GEN_MODULES_C_SRCS) | sort >$@.l-tmp; \ ( \ echo '/* Do not modify this file. */'; \ echo '/* It is created automatically by the Makefile. */'; \ echo '#include "libiberty.h"'; \ echo '#include "sim-module.h"'; \ sed -e 's:\(.*\):extern MODULE_INIT_FN \1;:' $@.l-tmp; \ echo 'MODULE_INSTALL_FN * const sim_modules_detected[] = {'; \ sed -e 's:\(.*\): \1,:' $@.l-tmp; \ echo '};'; \ echo 'const int sim_modules_detected_len = ARRAY_SIZE (sim_modules_detected);'; \ ) >$@.tmp; \ $(SHELL) $(srcroot)/move-if-change $@.tmp $(@D)/modules.c; \ rm -f $@.l-tmp; \ touch $@ .PRECIOUS: %/stamp-modules # Alias for developers. igen: $(IGEN) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. igen/libigen.a: $(igen_libigen_a_OBJECTS) $(igen_libigen_a_DEPENDENCIES) $(EXTRA_igen_libigen_a_DEPENDENCIES) igen/$(am__dirstamp) $(AM_V_at)-rm -f $@ $(AM_V_AR)$(AR_FOR_BUILD) $(ARFLAGS) $@ $(igen_libigen_a_OBJECTS) $(igen_libigen_a_LIBADD) $(AM_V_at)$(RANLIB_FOR_BUILD) $@ igen/igen$(EXEEXT): $(igen_igen_OBJECTS) $(igen_igen_DEPENDENCIES) igen/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(igen_igen_OBJECTS) $(igen_igen_LDADD) # igen is a build-time only tool. Override the default rules for it. igen/%.o: igen/%.c $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ # Build some of the files in standalone mode for developers of igen itself. igen/%-main.o: igen/%.c $(AM_V_CC)$(COMPILE_FOR_BUILD) -DMAIN -c $< -o $@ site-sim-config.exp: Makefile $(AM_V_GEN)( \ echo "set SIM_PRIMARY_TARGET \"$(SIM_PRIMARY_TARGET)\""; \ echo "set builddir \"$(builddir)\""; \ echo "set srcdir \"$(srcdir)/testsuite\""; \ $(foreach V,$(SIM_TOOLCHAIN_VARS),echo "set $(V) \"$($(V))\"";) \ ) > $@ # Ignore dirs that only contain configuration settings. check/./config/%.exp: ; @true check/config/%.exp: ; @true check/./lib/%.exp: ; @true check/lib/%.exp: ; @true check/%.exp: $(AM_V_at)mkdir -p testsuite/$* $(AM_V_RUNTEST)$(DO_RUNTEST) --objdir testsuite/$* --outdir testsuite/$* $*.exp check-DEJAGNU-parallel: $(AM_V_at)( \ set -- `cd $(srcdir)/testsuite && find . -name '*.exp' -printf '%P\n' | sed 's:[.]exp$$::'`; \ $(MAKE) -k `printf 'check/%s.exp ' $$@`; \ ret=$$?; \ set -- `printf 'testsuite/%s/ ' $$@`; \ $(SHELL) $(srcroot)/contrib/dg-extract-results.sh \ `find $$@ -maxdepth 1 -name testrun.sum 2>/dev/null | sort` > testrun.sum; \ $(SHELL) $(srcroot)/contrib/dg-extract-results.sh -L \ `find $$@ -maxdepth 1 -name testrun.log 2>/dev/null | sort` > testrun.log; \ echo; \ $(SED) -n '/^.*===.*Summary.*===/,$$p' testrun.sum; \ exit $$ret) check-DEJAGNU-single: $(AM_V_RUNTEST)$(DO_RUNTEST) # If running a single job, invoking runtest once is faster & has nicer output. check-DEJAGNU: site.exp $(AM_V_at)(set -e; \ EXPECT=${EXPECT} ; export EXPECT ; \ runtest=$(RUNTEST); \ if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ case "$(MAKEFLAGS)" in \ *-j*) $(MAKE) check-DEJAGNU-parallel;; \ *) $(MAKE) check-DEJAGNU-single;; \ esac; \ else \ echo "WARNING: could not find \`runtest'" 1>&2; :;\ fi) # These tests are build-time only tools. Override the default rules for them. testsuite/common/%.o: testsuite/common/%.c $(AM_V_CC)$(COMPILE_FOR_BUILD) $(testsuite_common_CPPFLAGS) -c $< -o $@ testsuite/common/alu-tst$(EXEEXT): $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_alu_tst_OBJECTS) $(testsuite_common_alu_tst_LDADD) testsuite/common/fpu-tst$(EXEEXT): $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_fpu_tst_OBJECTS) $(testsuite_common_fpu_tst_LDADD) testsuite/common/bits-gen$(EXEEXT): $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits_gen_OBJECTS) $(testsuite_common_bits_gen_LDADD) testsuite/common/bits32m0$(EXEEXT): $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m0_OBJECTS) $(testsuite_common_bits32m0_LDADD) testsuite/common/bits32m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c $(AM_V_GEN)$< 32 0 big > $@.tmp $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp $(AM_V_at)mv $@.tmp $@ testsuite/common/bits32m31$(EXEEXT): $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits32m31_OBJECTS) $(testsuite_common_bits32m31_LDADD) testsuite/common/bits32m31.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c $(AM_V_GEN)$< 32 31 little > $@.tmp $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp $(AM_V_at)mv $@.tmp $@ testsuite/common/bits64m0$(EXEEXT): $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m0_OBJECTS) $(testsuite_common_bits64m0_LDADD) testsuite/common/bits64m0.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c $(AM_V_GEN)$< 64 0 big > $@.tmp $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp $(AM_V_at)mv $@.tmp $@ testsuite/common/bits64m63$(EXEEXT): $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_DEPENDENCIES) testsuite/common/$(am__dirstamp) $(AM_V_CCLD)$(LINK_FOR_BUILD) $(testsuite_common_bits64m63_OBJECTS) $(testsuite_common_bits64m63_LDADD) testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/common/bits-tst.c $(AM_V_GEN)$< 64 63 little > $@.tmp $(AM_V_at)cat $(srcdir)/testsuite/common/bits-tst.c >> $@.tmp $(AM_V_at)mv $@.tmp $@ @SIM_ENABLE_ARCH_aarch64_TRUE@$(aarch64_libsim_a_OBJECTS) $(aarch64_libsim_a_LIBADD): aarch64/hw-config.h @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/modules.o: aarch64/modules.c @SIM_ENABLE_ARCH_aarch64_TRUE@aarch64/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_aarch64_TRUE@-@am__include@ aarch64/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_arm_TRUE@$(arm_libsim_a_OBJECTS) $(arm_libsim_a_LIBADD): arm/hw-config.h @SIM_ENABLE_ARCH_arm_TRUE@arm/modules.o: arm/modules.c @SIM_ENABLE_ARCH_arm_TRUE@arm/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_arm_TRUE@-@am__include@ arm/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_avr_TRUE@$(avr_libsim_a_OBJECTS) $(avr_libsim_a_LIBADD): avr/hw-config.h @SIM_ENABLE_ARCH_avr_TRUE@avr/modules.o: avr/modules.c @SIM_ENABLE_ARCH_avr_TRUE@avr/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_avr_TRUE@-@am__include@ avr/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_bfin_TRUE@$(bfin_libsim_a_OBJECTS) $(bfin_libsim_a_LIBADD): bfin/hw-config.h @SIM_ENABLE_ARCH_bfin_TRUE@bfin/modules.o: bfin/modules.c @SIM_ENABLE_ARCH_bfin_TRUE@bfin/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_bfin_TRUE@-@am__include@ bfin/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_bfin_TRUE@bfin/linux-fixed-code.h: @MAINT@ $(srcdir)/bfin/linux-fixed-code.s bfin/local.mk bfin/$(am__dirstamp) @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_GEN)$(AS_FOR_TARGET_BFIN) $(srcdir)/bfin/linux-fixed-code.s -o bfin/linux-fixed-code.o @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)(\ @SIM_ENABLE_ARCH_bfin_TRUE@ set -e; \ @SIM_ENABLE_ARCH_bfin_TRUE@ echo "/* DO NOT EDIT: Autogenerated from linux-fixed-code.s. */"; \ @SIM_ENABLE_ARCH_bfin_TRUE@ echo "static const unsigned char bfin_linux_fixed_code[] ="; \ @SIM_ENABLE_ARCH_bfin_TRUE@ echo "{"; \ @SIM_ENABLE_ARCH_bfin_TRUE@ $(OBJDUMP_FOR_TARGET_BFIN) -d -z bfin/linux-fixed-code.o > $@.dis; \ @SIM_ENABLE_ARCH_bfin_TRUE@ sed -n \ @SIM_ENABLE_ARCH_bfin_TRUE@ -e 's:^[^ ]* :0x:' \ @SIM_ENABLE_ARCH_bfin_TRUE@ -e '/^0x/{s: .*::;s: *$$:,:;s: :, 0x:g;p;}' \ @SIM_ENABLE_ARCH_bfin_TRUE@ $@.dis; \ @SIM_ENABLE_ARCH_bfin_TRUE@ rm -f $@.dis; \ @SIM_ENABLE_ARCH_bfin_TRUE@ echo "};" \ @SIM_ENABLE_ARCH_bfin_TRUE@ ) > $@.tmp @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/bfin/linux-fixed-code.h @SIM_ENABLE_ARCH_bfin_TRUE@ $(AM_V_at)touch $(srcdir)/bfin/linux-fixed-code.h @SIM_ENABLE_ARCH_bpf_TRUE@$(bpf_libsim_a_OBJECTS) $(bpf_libsim_a_LIBADD): bpf/hw-config.h @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.o: bpf/modules.c @SIM_ENABLE_ARCH_bpf_TRUE@bpf/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_bpf_TRUE@-@am__include@ bpf/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_bpf_TRUE@bpf/modules.c: | $(bpf_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-le.c bpf/eng-le.h: bpf/stamp-mloop-le ; @true @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-le: $(srccom)/genmloop.sh bpf/mloop.in @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfle -cpu bpfbf \ @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \ @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -le @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-le.hin bpf/eng-le.h @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-le.cin bpf/mloop-le.c @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_bpf_TRUE@bpf/mloop-be.c bpf/eng-be.h: bpf/stamp-mloop-be ; @true @SIM_ENABLE_ARCH_bpf_TRUE@bpf/stamp-mloop-be: $(srccom)/genmloop.sh bpf/mloop.in @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_bpf_TRUE@ -mono -scache -prefix bpfbf_ebpfbe -cpu bpfbf \ @SIM_ENABLE_ARCH_bpf_TRUE@ -infile $(srcdir)/bpf/mloop.in \ @SIM_ENABLE_ARCH_bpf_TRUE@ -outfile-prefix bpf/ -outfile-suffix -be @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/eng-be.hin bpf/eng-be.h @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change bpf/mloop-be.cin bpf/mloop-be.c @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen: bpf/cgen-arch bpf/cgen-cpu bpf/cgen-defs-le bpf/cgen-defs-be bpf/cgen-decode-le bpf/cgen-decode-be @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-arch: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)mach=bpf cpu=bpfbf FLAGS="with-scache"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/arch.h bpf/arch.c bpf/cpuall.h: @CGEN_MAINT@ bpf/cgen-arch @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-cpu: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle,ebpfbe cpu=bpfbf mach=bpf FLAGS="with-multiple-isa with-scache"; $(CGEN_GEN_CPU) @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_at)rm -f $(srcdir)/bpf/model.c @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cpu.h bpf/cpu.c bpf/model.c: @CGEN_MAINT@ bpf/cgen-cpu @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-le: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le"; $(CGEN_GEN_DEFS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-le.h: @CGEN_MAINT@ bpf/cgen-defs-le @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-defs-be: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be"; $(CGEN_GEN_DEFS) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/defs-be.h: @CGEN_MAINT@ bpf/cgen-defs-be @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-le: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfle cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-le" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-le.c bpf/decode-le.c bpf/decode-le.h: @CGEN_MAINT@ bpf/cgen-decode-vle @SIM_ENABLE_ARCH_bpf_TRUE@bpf/cgen-decode-be: @SIM_ENABLE_ARCH_bpf_TRUE@ $(AM_V_GEN)isa=ebpfbe cpu=bpfbf mach=bpf FLAGS="with-scache" SUFFIX="-be" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_DECODE) @SIM_ENABLE_ARCH_bpf_TRUE@bpf/sem-be.c bpf/decode-be.c bpf/decode-be.h: @CGEN_MAINT@ bpf/cgen-decode-be @SIM_ENABLE_ARCH_cr16_TRUE@$(cr16_libsim_a_OBJECTS) $(cr16_libsim_a_LIBADD): cr16/hw-config.h @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.o: cr16/modules.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_cr16_TRUE@-@am__include@ cr16/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_cr16_TRUE@cr16/modules.c: | $(cr16_BUILD_OUTPUTS) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode$(EXEEXT): $(cr16_gencode_OBJECTS) $(cr16_gencode_DEPENDENCIES) cr16/$(am__dirstamp) @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(cr16_gencode_OBJECTS) $(cr16_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_cr16_TRUE@cr16/gencode.o: cr16/gencode.c @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_cr16_TRUE@cr16/cr16-opc.o: ../opcodes/cr16-opc.c @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_cr16_TRUE@cr16/simops.h: cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< -h >$@ @SIM_ENABLE_ARCH_cr16_TRUE@cr16/table.c: cr16/gencode$(EXEEXT) @SIM_ENABLE_ARCH_cr16_TRUE@ $(AM_V_GEN)$< >$@ @SIM_ENABLE_ARCH_cris_TRUE@$(cris_libsim_a_OBJECTS) $(cris_libsim_a_LIBADD): cris/hw-config.h @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.o: cris/modules.c @SIM_ENABLE_ARCH_cris_TRUE@cris/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_cris_TRUE@-@am__include@ cris/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_cris_TRUE@cris/modules.c: | $(cris_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv10f.c cris/engv10.h: cris/stamp-mloop-v10f ; @true @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v10f: $(srccom)/genmloop.sh cris/mloop.in @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv10f-switch.c \ @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv10f \ @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v10f @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v10f.hin cris/engv10.h @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v10f.cin cris/mloopv10f.c @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_cris_TRUE@cris/mloopv32f.c cris/engv32.h: cris/stamp-mloop-v32f ; @true @SIM_ENABLE_ARCH_cris_TRUE@cris/stamp-mloop-v32f: $(srccom)/genmloop.sh cris/mloop.in @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_cris_TRUE@ -mono -no-fast -pbb -switch semcrisv32f-switch.c \ @SIM_ENABLE_ARCH_cris_TRUE@ -cpu crisv32f \ @SIM_ENABLE_ARCH_cris_TRUE@ -infile $(srcdir)/cris/mloop.in -outfile-prefix cris/ -outfile-suffix -v32f @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/eng-v32f.hin cris/engv32.h @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change cris/mloop-v32f.cin cris/mloopv32f.c @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen: cris/cgen-arch cris/cgen-cpu-decode-v10f cris/cgen-cpu-decode-v32f @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-arch: @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)mach=crisv10,crisv32 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_cris_TRUE@cris/arch.h cris/arch.c cris/cpuall.h: @CGEN_MAINT@ cris/cgen-arch @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v10f: @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv10f mach=crisv10 SUFFIX=v10 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv10-switch.c $(srcdir)/cris/semcrisv10f-switch.c @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv10.h cris/cpuv10.c cris/semcrisv10f-switch.c cris/modelv10.c cris/decodev10.c cris/decodev10.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v10f @SIM_ENABLE_ARCH_cris_TRUE@cris/cgen-cpu-decode-v32f: @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_GEN)cpu=crisv32f mach=crisv32 SUFFIX=v32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_cris_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $(srcdir)/cris/semv32-switch.c $(srcdir)/cris/semcrisv32f-switch.c @SIM_ENABLE_ARCH_cris_TRUE@cris/cpuv32.h cris/cpuv32.c cris/semcrisv32f-switch.c cris/modelv32.c cris/decodev32.c cris/decodev32.h: @CGEN_MAINT@ cris/cgen-cpu-decode-v32f @SIM_ENABLE_ARCH_d10v_TRUE@$(d10v_libsim_a_OBJECTS) $(d10v_libsim_a_LIBADD): d10v/hw-config.h @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.o: d10v/modules.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_d10v_TRUE@-@am__include@ d10v/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_d10v_TRUE@d10v/modules.c: | $(d10v_BUILD_OUTPUTS) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode$(EXEEXT): $(d10v_gencode_OBJECTS) $(d10v_gencode_DEPENDENCIES) d10v/$(am__dirstamp) @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(d10v_gencode_OBJECTS) $(d10v_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@ @SIM_ENABLE_ARCH_erc32_TRUE@$(erc32_libsim_a_OBJECTS) $(erc32_libsim_a_LIBADD): erc32/hw-config.h @SIM_ENABLE_ARCH_erc32_TRUE@erc32/modules.o: erc32/modules.c @SIM_ENABLE_ARCH_erc32_TRUE@erc32/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_erc32_TRUE@-@am__include@ erc32/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_erc32_TRUE@erc32/sis$(EXEEXT): erc32/run$(EXEEXT) @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_GEN)ln $< $@ 2>/dev/null || $(LN_S) $< $@ 2>/dev/null || cp -p $< $@ @SIM_ENABLE_ARCH_erc32_TRUE@sim-%D-install-exec-local: installdirs @SIM_ENABLE_ARCH_erc32_TRUE@ $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir) @SIM_ENABLE_ARCH_erc32_TRUE@ n=`echo sis | sed '$(program_transform_name)'`; \ @SIM_ENABLE_ARCH_erc32_TRUE@ $(LIBTOOL) --mode=install $(INSTALL_PROGRAM) erc32/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) @SIM_ENABLE_ARCH_erc32_TRUE@sim-erc32-uninstall-local: @SIM_ENABLE_ARCH_erc32_TRUE@ rm -f $(DESTDIR)$(bindir)/sis @SIM_ENABLE_ARCH_examples_TRUE@$(example_synacor_libsim_a_OBJECTS) $(example_synacor_libsim_a_LIBADD): example-synacor/hw-config.h @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/modules.o: example-synacor/modules.c @SIM_ENABLE_ARCH_examples_TRUE@example-synacor/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_examples_TRUE@-@am__include@ example-synacor/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_frv_TRUE@$(frv_libsim_a_OBJECTS) $(frv_libsim_a_LIBADD): frv/hw-config.h @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.o: frv/modules.c @SIM_ENABLE_ARCH_frv_TRUE@frv/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_frv_TRUE@-@am__include@ frv/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_frv_TRUE@frv/modules.c: | $(frv_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \ @SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \ @SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/ @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen: frv/cgen-arch frv/cgen-cpu-decode @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-arch: @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_frv_TRUE@frv/arch.h frv/arch.c frv/cpuall.h: @CGEN_MAINT@ frv/cgen-arch @SIM_ENABLE_ARCH_frv_TRUE@frv/cgen-cpu-decode: @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" EXTRAFILES="$(CGEN_CPU_SEM)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_frv_TRUE@frv/cpu.h frv/sem.c frv/model.c frv/decode.c frv/decode.h: @CGEN_MAINT@ frv/cgen-cpu-decode @SIM_ENABLE_ARCH_ft32_TRUE@$(ft32_libsim_a_OBJECTS) $(ft32_libsim_a_LIBADD): ft32/hw-config.h @SIM_ENABLE_ARCH_ft32_TRUE@ft32/modules.o: ft32/modules.c @SIM_ENABLE_ARCH_ft32_TRUE@ft32/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_ft32_TRUE@-@am__include@ ft32/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_h8300_TRUE@$(h8300_libsim_a_OBJECTS) $(h8300_libsim_a_LIBADD): h8300/hw-config.h @SIM_ENABLE_ARCH_h8300_TRUE@h8300/modules.o: h8300/modules.c @SIM_ENABLE_ARCH_h8300_TRUE@h8300/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_h8300_TRUE@-@am__include@ h8300/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_iq2000_TRUE@$(iq2000_libsim_a_OBJECTS) $(iq2000_libsim_a_LIBADD): iq2000/hw-config.h @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.o: iq2000/modules.c @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_iq2000_TRUE@-@am__include@ iq2000/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/modules.c: | $(iq2000_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen: iq2000/cgen-arch iq2000/cgen-cpu-decode @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-arch: @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)mach=iq2000 FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/arch.h iq2000/arch.c iq2000/cpuall.h: @CGEN_MAINT@ iq2000/cgen-arch @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cgen-cpu-decode: @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)cpu=iq2000bf mach=iq2000 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/cpu.h iq2000/sem.c iq2000/sem-switch.c iq2000/model.c iq2000/decode.c iq2000/decode.h: @CGEN_MAINT@ iq2000/cgen-cpu-decode @SIM_ENABLE_ARCH_lm32_TRUE@$(lm32_libsim_a_OBJECTS) $(lm32_libsim_a_LIBADD): lm32/hw-config.h @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.o: lm32/modules.c @SIM_ENABLE_ARCH_lm32_TRUE@lm32/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_lm32_TRUE@-@am__include@ lm32/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_lm32_TRUE@lm32/modules.c: | $(lm32_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \ @SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/ @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch: @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode: @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode @SIM_ENABLE_ARCH_m32c_TRUE@$(m32c_libsim_a_OBJECTS) $(m32c_libsim_a_LIBADD): m32c/hw-config.h @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.o: m32c/modules.c @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_m32c_TRUE@-@am__include@ m32c/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_m32c_TRUE@m32c/modules.c: | $(m32c_BUILD_OUTPUTS) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) # opc2c is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@ @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@ @SIM_ENABLE_ARCH_m32r_TRUE@$(m32r_libsim_a_OBJECTS) $(m32r_libsim_a_LIBADD): m32r/hw-config.h @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.o: m32r/modules.c @SIM_ENABLE_ARCH_m32r_TRUE@m32r/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_m32r_TRUE@-@am__include@ m32r/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_m32r_TRUE@m32r/modules.c: | $(m32r_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/ @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop-x ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop-2 ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen: m32r/cgen-arch m32r/cgen-cpu-decode m32r/cgen-cpu-decode-x m32r/cgen-cpu-decode-2 @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-arch: @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/arch.h m32r/arch.c m32r/cpuall.h: @CGEN_MAINT@ m32r/cgen-arch @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode: @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu.h m32r/sem.c m32r/sem-switch.c m32r/model.c m32r/decode.c m32r/decode.h: @CGEN_MAINT@ m32r/cgen-cpu-decode @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-x: @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpux.h m32r/semx-switch.c m32r/modelx.c m32r/decodex.c m32r/decodex.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-x @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cgen-cpu-decode-2: @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_m32r_TRUE@m32r/cpu2.h m32r/sem2-switch.c m32r/model2.c m32r/decode2.c m32r/decode2.h: @CGEN_MAINT@ m32r/cgen-cpu-decode-2 @SIM_ENABLE_ARCH_m68hc11_TRUE@$(m68hc11_libsim_a_OBJECTS) $(m68hc11_libsim_a_LIBADD): m68hc11/hw-config.h @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.o: m68hc11/modules.c @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_m68hc11_TRUE@-@am__include@ m68hc11/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/modules.c: | $(m68hc11_BUILD_OUTPUTS) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@ @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@ @SIM_ENABLE_ARCH_mcore_TRUE@$(mcore_libsim_a_OBJECTS) $(mcore_libsim_a_LIBADD): mcore/hw-config.h @SIM_ENABLE_ARCH_mcore_TRUE@mcore/modules.o: mcore/modules.c @SIM_ENABLE_ARCH_mcore_TRUE@mcore/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_mcore_TRUE@-@am__include@ mcore/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_microblaze_TRUE@$(microblaze_libsim_a_OBJECTS) $(microblaze_libsim_a_LIBADD): microblaze/hw-config.h @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/modules.o: microblaze/modules.c @SIM_ENABLE_ARCH_microblaze_TRUE@microblaze/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_microblaze_TRUE@-@am__include@ microblaze/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_mips_TRUE@$(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD): mips/hw-config.h @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.o: mips/modules.c @SIM_ENABLE_ARCH_mips_TRUE@mips/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_mips_TRUE@-@am__include@ mips/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_mips_TRUE@mips/modules.c: | $(mips_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_IGEN_ITABLE): mips/stamp-igen-itable @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_SINGLE): mips/stamp-gen-mode-single @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M16): mips/stamp-gen-mode-m16-m16 @SIM_ENABLE_ARCH_mips_TRUE@$(mips_BUILT_SRC_FROM_GEN_MODE_M16_M32): mips/stamp-gen-mode-m16-m32 @SIM_ENABLE_ARCH_mips_TRUE@$(SIM_MIPS_MULTI_SRC): mips/stamp-gen-mode-multi-igen mips/stamp-gen-mode-multi-run @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-igen-itable: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(IGEN) @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \ @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnowidth \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnounimplemented \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_IGEN_ITABLE_FLAGS) \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \ @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.h -ht mips/itable.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n itable.c -t mips/itable.c @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-single: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \ @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \ @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \ @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \ @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \ @SIM_ENABLE_ARCH_mips_TRUE@ -x \ @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.h -hc mips/icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n icache.c -c mips/icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.h -hs mips/semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n semantics.c -s mips/semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.h -hd mips/idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n idecode.c -d mips/idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n model.h -hm mips/model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n model.c -m mips/model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n support.h -hf mips/support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n support.c -f mips/support.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.h -he mips/engine.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n engine.c -e mips/engine.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n irun.c -r mips/irun.c @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m16: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_M16_DC) $(IGEN) @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \ @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_M16_FLAGS) \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_mips_TRUE@ -B 16 \ @SIM_ENABLE_ARCH_mips_TRUE@ -H 15 \ @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \ @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_M16_DC) \ @SIM_ENABLE_ARCH_mips_TRUE@ -P m16_ \ @SIM_ENABLE_ARCH_mips_TRUE@ -x \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.h -hc mips/m16_icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_icache.c -c mips/m16_icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.h -hs mips/m16_semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_semantics.c -s mips/m16_semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.h -hd mips/m16_idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_idecode.c -d mips/m16_idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.h -hm mips/m16_model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_model.c -m mips/m16_model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.h -hf mips/m16_support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m16_support.c -f mips/m16_support.c @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-m16-m32: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \ @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SIM_MIPS_SINGLE_FLAGS) \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_mips_TRUE@ -B 32 \ @SIM_ENABLE_ARCH_mips_TRUE@ -H 31 \ @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \ @SIM_ENABLE_ARCH_mips_TRUE@ -o $(mips_IGEN_DC) \ @SIM_ENABLE_ARCH_mips_TRUE@ -P m32_ \ @SIM_ENABLE_ARCH_mips_TRUE@ -x \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.h -hc mips/m32_icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_icache.c -c mips/m32_icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.h -hs mips/m32_semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_semantics.c -s mips/m32_semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.h -hd mips/m32_idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_idecode.c -d mips/m32_idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.h -hm mips/m32_model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_model.c -m mips/m32_model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.h -hf mips/m32_support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n m32_support.c -f mips/m32_support.c @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-igen: $(mips_IGEN_INSN) $(mips_IGEN_INSN_INC) $(mips_IGEN_DC) $(mips_M16_DC) $(mips_MICROMIPS32_DC) $(mips_MICROMIPS16_DC) $(IGEN) @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\ @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \ @SIM_ENABLE_ARCH_mips_TRUE@ p=`echo $${t} | sed -e 's/:.*//'` ; \ @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \ @SIM_ENABLE_ARCH_mips_TRUE@ f=`echo $${t} | sed -e 's/.*://'` ; \ @SIM_ENABLE_ARCH_mips_TRUE@ case $${p} in \ @SIM_ENABLE_ARCH_mips_TRUE@ micromips16*) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_MICROMIPS16_DC) -F 16" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ micromips32* | micromips64*) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_MICROMIPS32_DC) -F $${f}" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m32*) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \ @SIM_ENABLE_ARCH_mips_TRUE@ m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ micromips_m64*) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}"; \ @SIM_ENABLE_ARCH_mips_TRUE@ m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 16 -H 15 -o $(mips_M16_DC) -F 16" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ *) \ @SIM_ENABLE_ARCH_mips_TRUE@ e="-B 32 -H 31 -o $(mips_IGEN_DC) -F $${f}" ;; \ @SIM_ENABLE_ARCH_mips_TRUE@ esac; \ @SIM_ENABLE_ARCH_mips_TRUE@ $(IGEN_RUN) \ @SIM_ENABLE_ARCH_mips_TRUE@ $(mips_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mips_TRUE@ $${e} \ @SIM_ENABLE_ARCH_mips_TRUE@ -I $(srcdir)/mips \ @SIM_ENABLE_ARCH_mips_TRUE@ -Werror \ @SIM_ENABLE_ARCH_mips_TRUE@ -Wnodiscard \ @SIM_ENABLE_ARCH_mips_TRUE@ -M $${m} \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mips_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_mips_TRUE@ -i $(mips_IGEN_INSN) \ @SIM_ENABLE_ARCH_mips_TRUE@ -P $${p}_ \ @SIM_ENABLE_ARCH_mips_TRUE@ -x \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.h -hc mips/$${p}_icache.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_icache.c -c mips/$${p}_icache.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.h -hs mips/$${p}_semantics.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_semantics.c -s mips/$${p}_semantics.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.h -hd mips/$${p}_idecode.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_idecode.c -d mips/$${p}_idecode.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.h -hm mips/$${p}_model.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_model.c -m mips/$${p}_model.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.h -hf mips/$${p}_support.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_support.c -f mips/$${p}_support.c \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.h -he mips/$${p}_engine.h \ @SIM_ENABLE_ARCH_mips_TRUE@ -n $${p}_engine.c -e mips/$${p}_engine.c \ @SIM_ENABLE_ARCH_mips_TRUE@ || exit; \ @SIM_ENABLE_ARCH_mips_TRUE@ done @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mips_TRUE@mips/stamp-gen-mode-multi-run: mips/m16run.c mips/micromipsrun.c @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_GEN)\ @SIM_ENABLE_ARCH_mips_TRUE@ for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \ @SIM_ENABLE_ARCH_mips_TRUE@ case $${t} in \ @SIM_ENABLE_ARCH_mips_TRUE@ m16*) \ @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \ @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/m16$${m}_run.c; \ @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/m16run.c > $$o.tmp \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/m16$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/m16$${m}_engine/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m16_/m16$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \ @SIM_ENABLE_ARCH_mips_TRUE@ ;;\ @SIM_ENABLE_ARCH_mips_TRUE@ micromips32*) \ @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \ @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \ @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips32$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips32$${m}_engine/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips32$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m32$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \ @SIM_ENABLE_ARCH_mips_TRUE@ ;;\ @SIM_ENABLE_ARCH_mips_TRUE@ micromips64*) \ @SIM_ENABLE_ARCH_mips_TRUE@ m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \ @SIM_ENABLE_ARCH_mips_TRUE@ o=mips/micromips$${m}_run.c; \ @SIM_ENABLE_ARCH_mips_TRUE@ sed < $(srcdir)/mips/micromipsrun.c > $$o.tmp \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/^sim_/micromips64$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "/include/s/sim-engine/micromips64$${m}_engine/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips16_/micromips16$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/micromips32_/micromips64$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ -e "s/m32_/m64$${m}_/" \ @SIM_ENABLE_ARCH_mips_TRUE@ || exit 1; \ @SIM_ENABLE_ARCH_mips_TRUE@ $(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \ @SIM_ENABLE_ARCH_mips_TRUE@ ;;\ @SIM_ENABLE_ARCH_mips_TRUE@ esac \ @SIM_ENABLE_ARCH_mips_TRUE@ done @SIM_ENABLE_ARCH_mips_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.o: mn10300/modules.c @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_mn10300_TRUE@-@am__include@ mn10300/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -x \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/icache.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/semantics.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/semantics.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/idecode.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/model.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/model.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/support.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/support.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/itable.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/engine.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/engine.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/irun.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_moxie_TRUE@$(moxie_libsim_a_OBJECTS) $(moxie_libsim_a_LIBADD): moxie/hw-config.h @SIM_ENABLE_ARCH_moxie_TRUE@moxie/modules.o: moxie/modules.c @SIM_ENABLE_ARCH_moxie_TRUE@moxie/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_moxie_TRUE@-@am__include@ moxie/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp) @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \ @SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \ @SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \ @SIM_ENABLE_ARCH_moxie_TRUE@ else \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \ @SIM_ENABLE_ARCH_moxie_TRUE@ fi @SIM_ENABLE_ARCH_msp430_TRUE@$(msp430_libsim_a_OBJECTS) $(msp430_libsim_a_LIBADD): msp430/hw-config.h @SIM_ENABLE_ARCH_msp430_TRUE@msp430/modules.o: msp430/modules.c @SIM_ENABLE_ARCH_msp430_TRUE@msp430/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_msp430_TRUE@-@am__include@ msp430/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_or1k_TRUE@$(or1k_libsim_a_OBJECTS) $(or1k_libsim_a_LIBADD): or1k/hw-config.h @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.o: or1k/modules.c @SIM_ENABLE_ARCH_or1k_TRUE@or1k/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_or1k_TRUE@-@am__include@ or1k/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_or1k_TRUE@or1k/modules.c: | $(or1k_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \ @SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/ @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen: or1k/cgen-arch or1k/cgen-cpu-decode @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-arch: @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)mach=or32,or32nd FLAGS="with-scache"; $(CGEN_GEN_ARCH) @SIM_ENABLE_ARCH_or1k_TRUE@or1k/arch.h or1k/arch.c or1k/cpuall.h: @CGEN_MAINT@ or1k/cgen-arch @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cgen-cpu-decode: @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)cpu=or1k32bf mach=or32,or32nd FLAGS="with-scache" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE) @SIM_ENABLE_ARCH_or1k_TRUE@or1k/cpu.h or1k/cpu.c or1k/model.c or1k/sem.c or1k/sem-switch.c or1k/decode.c or1k/decode.h: @CGEN_MAINT@ or1k/cgen-cpu-decode @SIM_ENABLE_ARCH_ppc_TRUE@ppc/libsim.a: common/libcommon.a @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_ppc_TRUE@ppc/%.o: ppc/%.c | ppc/libsim.a $(SIM_ALL_RECURSIVE_DEPS) @SIM_ENABLE_ARCH_ppc_TRUE@ $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F) @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.c: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp) @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --source $@.tmp @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.c @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.c @SIM_ENABLE_ARCH_ppc_TRUE@ppc/spreg.h: @MAINT@ ppc/ppc-spr-table ppc/spreg-gen.py ppc/$(am__dirstamp) @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_GEN)$(srcdir)/ppc/spreg-gen.py --header $@.tmp @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change $@.tmp $(srcdir)/ppc/spreg.h @SIM_ENABLE_ARCH_ppc_TRUE@ $(AM_V_at)touch $(srcdir)/ppc/spreg.h @SIM_ENABLE_ARCH_pru_TRUE@$(pru_libsim_a_OBJECTS) $(pru_libsim_a_LIBADD): pru/hw-config.h @SIM_ENABLE_ARCH_pru_TRUE@pru/modules.o: pru/modules.c @SIM_ENABLE_ARCH_pru_TRUE@pru/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_pru_TRUE@-@am__include@ pru/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_riscv_TRUE@$(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD): riscv/hw-config.h @SIM_ENABLE_ARCH_riscv_TRUE@riscv/modules.o: riscv/modules.c @SIM_ENABLE_ARCH_riscv_TRUE@riscv/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_riscv_TRUE@-@am__include@ riscv/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_rl78_TRUE@$(rl78_libsim_a_OBJECTS) $(rl78_libsim_a_LIBADD): rl78/hw-config.h @SIM_ENABLE_ARCH_rl78_TRUE@rl78/modules.o: rl78/modules.c @SIM_ENABLE_ARCH_rl78_TRUE@rl78/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_rl78_TRUE@-@am__include@ rl78/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_rx_TRUE@$(rx_libsim_a_OBJECTS) $(rx_libsim_a_LIBADD): rx/hw-config.h @SIM_ENABLE_ARCH_rx_TRUE@rx/modules.o: rx/modules.c @SIM_ENABLE_ARCH_rx_TRUE@rx/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_rx_TRUE@-@am__include@ rx/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_sh_TRUE@$(sh_libsim_a_OBJECTS) $(sh_libsim_a_LIBADD): sh/hw-config.h @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.o: sh/modules.c @SIM_ENABLE_ARCH_sh_TRUE@sh/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_sh_TRUE@-@am__include@ sh/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_sh_TRUE@sh/modules.c: | $(sh_BUILD_OUTPUTS) # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@ @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@ @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@ @SIM_ENABLE_ARCH_v850_TRUE@$(v850_libsim_a_OBJECTS) $(v850_libsim_a_LIBADD): v850/hw-config.h @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.o: v850/modules.c @SIM_ENABLE_ARCH_v850_TRUE@v850/%.o: common/%.c ; $(SIM_COMPILE) @SIM_ENABLE_ARCH_v850_TRUE@-@am__include@ v850/$(DEPDIR)/*.Po @SIM_ENABLE_ARCH_v850_TRUE@v850/modules.c: | $(v850_BUILD_OUTPUTS) @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \ @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \ @SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \ @SIM_ENABLE_ARCH_v850_TRUE@ -x \ @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/icache.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/semantics.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/semantics.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/idecode.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/model.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/model.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/support.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/support.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/itable.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/engine.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/engine.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/irun.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@ all-recursive: $(SIM_ALL_RECURSIVE_DEPS) install-data-local: installdirs $(SIM_INSTALL_DATA_LOCAL_DEPS) $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(libdir) lib=`echo sim | sed '$(program_transform_name)'`; \ for d in $(SIM_ENABLED_ARCHES); do \ n="$$lib"; \ [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \ n="lib$$n.a"; \ $(INSTALL_DATA) $$d/libsim.a $(DESTDIR)$(libdir)/$$n || exit 1; \ done install-exec-local: installdirs $(SIM_INSTALL_EXEC_LOCAL_DEPS) $(AM_V_at)$(MKDIR_P) $(DESTDIR)$(bindir) run=`echo run | sed '$(program_transform_name)'`; \ for d in $(SIM_ENABLED_ARCHES); do \ n="$$run"; \ [ "$(SIM_PRIMARY_TARGET)" = "$$d" ] || n="$$n-$$d"; \ $(LIBTOOL) --mode=install \ $(INSTALL_PROGRAM) $$d/run$(EXEEXT) $(DESTDIR)$(bindir)/$$n$(EXEEXT) || exit 1; \ done uninstall-local: $(SIM_UNINSTALL_LOCAL_DEPS) rm -f $(DESTDIR)$(bindir)/run $(DESTDIR)$(libdir)/libsim.a for d in $(SIM_ENABLED_ARCHES); do \ rm -f $(DESTDIR)$(bindir)/run-$$d $(DESTDIR)$(libdir)/libsim-$$d.a; \ done # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: