From 1368b914e93a3af332f787d3d41c106d11bb90da Mon Sep 17 00:00:00 2001
From: Mike Frysinger <vapier@gentoo.org>
Date: Tue, 5 Jan 2021 22:09:57 -0500
Subject: sim: testsuite: flatten tree

Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.

We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim".  Since we have no
other dirs in this tree, and no plans to add any, should be fine.
---
 sim/testsuite/bfin/add_sub_acc.s | 123 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 123 insertions(+)
 create mode 100644 sim/testsuite/bfin/add_sub_acc.s

(limited to 'sim/testsuite/bfin/add_sub_acc.s')

diff --git a/sim/testsuite/bfin/add_sub_acc.s b/sim/testsuite/bfin/add_sub_acc.s
new file mode 100644
index 00000000000..84416d0fb02
--- /dev/null
+++ b/sim/testsuite/bfin/add_sub_acc.s
@@ -0,0 +1,123 @@
+// ACP 5.9 A0 -= A1 doesn't set flags
+# mach: bfin
+
+.include "testutils.inc"
+	start
+
+	A1 = A0 = 0;
+	R0 = 0x0;
+	astat=r0;
+	A0.w = R0;
+	R0.L = 0x0080;
+	A0.x = R0;
+	R1 = 1;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 -= A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x0);
+	dbga (r7.l, 0x1006);
+
+	A1 = A0 = 0;
+	R0 = 0x1 (z);
+	astat=r0;
+	A0.w = R0;
+	R0.L = 0x0080;
+	A0.x = R0;
+	R1 = 1;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 -= A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x0);
+	dbga (r7.l, 0x1006);
+
+	A1 = A0 = 0;
+	R0 = 0x0;
+	astat=r0;
+	A0.w = R0;
+	R0.L = 0x0080;
+	A0.x = R0;
+	R1 = 1;
+	A1 = R1;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 -= A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x3);
+	dbga (r7.l, 0x1006);
+
+	A1 = A0 = 0;
+	R0 = 0x1 (z);
+	astat=r0;
+	A0.w = R0;
+	R0.L = 0x0080;
+	A0.x = R0;
+	R1 = 2 (z);
+	A1 = R1;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 -= A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x3);
+	dbga (r7.l, 0x1006);
+
+	#
+
+	A1 = A0 = 0;
+	R0 = 0x0;
+	astat=r0;
+	R0.L=0xffff;
+	R0.H=0xffff;
+	A0.w = R0;
+	R1=0x7f;
+	A0.x = R1;
+	A1.x = R1;
+	A1.w = R0;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 += A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x3);
+	dbga (r7.l, 0x0);
+
+	A1 = A0 = 0;
+	R0 = 0x0;
+	astat=r0;
+	A0.w = R0;
+	R1=0x80;
+	A0.x = R1;
+	A1.x = R1;
+	A1.w = R0;
+
+	_DBG A0;
+	_DBG A1;
+
+	A0 += A1;
+	_dbg A0;
+	_dbg ASTAT;
+	r7=astat;
+	dbga (r7.h, 0x3);
+	dbga (r7.l, 0x1006);
+
+	pass;
-- 
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