From 1155e06e3fa4e1e25c3e0aac9edfbb564e6c5428 Mon Sep 17 00:00:00 2001 From: Fred Fish Date: Mon, 13 Oct 1997 18:26:52 +0000 Subject: * simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move exception generation code to OP_6E01. (OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception generation code. PR 13550 --- sim/d10v/simops.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'sim/d10v/simops.c') diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index ad77e05bb77..df0f82642b6 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -2360,13 +2360,7 @@ OP_6E1F () void OP_6A01 () { - trace_input ("st2w", OP_DREG, OP_POSTDEC, OP_VOID); - if ( OP[1] == 15 ) - { - (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n"); - State.exception = SIGILL; - return; - } + trace_input ("st2w", OP_DREG, OP_POSTINC, OP_VOID); SW (State.regs[OP[1]], State.regs[OP[0]]); SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]); INC_ADDR (State.regs[OP[1]],4); @@ -2377,7 +2371,13 @@ OP_6A01 () void OP_6E01 () { - trace_input ("st2w", OP_DREG, OP_POSTINC, OP_VOID); + trace_input ("st2w", OP_DREG, OP_POSTDEC, OP_VOID); + if ( OP[1] == 15 ) + { + (*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n"); + State.exception = SIGILL; + return; + } SW (State.regs[OP[1]], State.regs[OP[0]]); SW (State.regs[OP[1]]+2, State.regs[OP[0]+1]); INC_ADDR (State.regs[OP[1]],-4); -- cgit v1.2.1