From 344c74a665f2f76ce61b1306fa983d7862ab66dc Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 1 Aug 2013 20:25:30 +0000 Subject: opcodes/ * mips-opc.c (mips_builtin_opcodes): Use WR_31 rather than WR_d for the single-operand forms of JALR and JALR.HB. * micromips-opc.c (micromips_opcodes): Likewise JALR, JALRS, JALR.HB and JALRS.HB. --- opcodes/micromips-opc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'opcodes/micromips-opc.c') diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index d8e4c72198e..30dec8f26fd 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -707,15 +707,15 @@ const struct mips_opcode micromips_opcodes[] = {"j", "a", 0xd4000000, 0xfc000000, UBD, 0, I1, 0, 0 }, {"jalr", "mj", 0x45c0, 0xffe0, UBD|WR_31, RD_mj|BD32, I1, 0, 0 }, {"jalr", "my,mj", 0x45c0, 0xffe0, UBD|WR_31, RD_mj|BD32, I1, 0, 0 }, -{"jalr", "s", 0x03e00f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD32, I1, 0, 0 }, +{"jalr", "s", 0x03e00f3c, 0xffe0ffff, UBD|RD_s|WR_31, BD32, I1, 0, 0 }, {"jalr", "t,s", 0x00000f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD32, I1, 0, 0 }, -{"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD32, I1, 0, 0 }, +{"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, UBD|RD_s|WR_31, BD32, I1, 0, 0 }, {"jalr.hb", "t,s", 0x00001f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD32, I1, 0, 0 }, {"jalrs", "mj", 0x45e0, 0xffe0, UBD|WR_31, RD_mj|BD16, I1, 0, 0 }, {"jalrs", "my,mj", 0x45e0, 0xffe0, UBD|WR_31, RD_mj|BD16, I1, 0, 0 }, -{"jalrs", "s", 0x03e04f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD16, I1, 0, 0 }, +{"jalrs", "s", 0x03e04f3c, 0xffe0ffff, UBD|RD_s|WR_31, BD16, I1, 0, 0 }, {"jalrs", "t,s", 0x00004f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD16, I1, 0, 0 }, -{"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, UBD|RD_s|WR_t, BD16, I1, 0, 0 }, +{"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, UBD|RD_s|WR_31, BD16, I1, 0, 0 }, {"jalrs.hb", "t,s", 0x00005f3c, 0xfc00ffff, UBD|RD_s|WR_t, BD16, I1, 0, 0 }, /* SVR4 PIC code requires special handling for jal, so it must be a macro. */ -- cgit v1.2.1