From 8884595866edbe6697a1268f5605b7ffe91efb0a Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Wed, 3 Dec 2003 17:38:48 +0000 Subject: Add support for the M32R2 processor. --- opcodes/m32r-asm.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'opcodes/m32r-asm.c') diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index a8c9485f20f..8c2cc81ea89 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -147,7 +147,11 @@ parse_slo16 (cd, strp, opindex, valuep) ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - value &= 0xffff; + { + value &= 0xffff; + if (value & 0x8000) + value |= 0xffff0000; + } *valuep = value; return errmsg; } @@ -310,12 +314,18 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) fields->f_uimm24 = value; } break; + case M32R_OPERAND_UIMM3 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, &fields->f_uimm3); + break; case M32R_OPERAND_UIMM4 : errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4); break; case M32R_OPERAND_UIMM5 : errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5); break; + case M32R_OPERAND_UIMM8 : + errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, &fields->f_uimm8); + break; case M32R_OPERAND_ULO16 : errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16); break; -- cgit v1.2.1