From ef07be453e0edf2f43034fcbc0581f61e630993e Mon Sep 17 00:00:00 2001 From: "Cui, Lili" Date: Mon, 31 Oct 2022 21:07:17 +0800 Subject: Support Intel PREFETCHI gas/ChangeLog: * NEWS: Add support for Intel PREFETCHI instruction. * config/tc-i386.c (load_insn_p): Use prefetch* to fold all prefetches. (md_assemble): Add warning for illegal input of PREFETCHI. * doc/c-i386.texi: Document .prefetchi. * testsuite/gas/i386/i386.exp: Run PREFETCHI tests. * testsuite/gas/i386/x86-64-lfence-load.d: Add PREFETCHI. * testsuite/gas/i386/x86-64-lfence-load.s: Likewise. * testsuite/gas/i386/x86-64-prefetch.d: New test. * testsuite/gas/i386/x86-64-prefetchi-intel.d: Likewise. * testsuite/gas/i386/x86-64-prefetchi-inval-register.d: Likewise.. * testsuite/gas/i386/x86-64-prefetchi-inval-register.s: Likewise. * testsuite/gas/i386/x86-64-prefetchi-warn.l: Likewise. * testsuite/gas/i386/x86-64-prefetchi-warn.s: Likewise. * testsuite/gas/i386/x86-64-prefetchi.d: Likewise. * testsuite/gas/i386/x86-64-prefetchi.s: Likewise. opcodes/ChangeLog: * i386-dis.c (reg_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7 (x86_64_table): Add X86_64_0F18_REG_6_MOD_0 and X86_64_0F18_REG_7_MOD_0. (mod_table): Add MOD_0F18_REG_6 and MOD_0F18_REG_7. (prefix_table): Add PREFIX_0F18_REG_6_MOD_0_X86_64 and PREFIX_0F18_REG_7_MOD_0_X86_64. (PREFETCHI_Fixup): New. * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHI_FLAGS. (cpu_flags): Add CpuPREFETCHI. * i386-opc.h (CpuPREFETCHI): New. (i386_cpu_flags): Add cpuprefetchi. * i386-opc.tbl: Add Intel PREFETCHI instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. --- opcodes/i386-opc.tbl | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'opcodes/i386-opc.tbl') diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index e49d3dc98a2..00bbf57ccff 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3264,3 +3264,10 @@ vrsqrtph, 0x664e, None, CpuAVX512_FP16, Modrm|Masking=3|EVexMap6|VexW0|Broadcast vrsqrtsh, 0x664f, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=3|EVexMap6|VexVVVV|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|Word|Unspecified|BaseIndex, RegXMM, RegXMM } // FP16 (HFNI) instructions end. + +// PREFETCHI instructions. + +prefetchit0, 0xf18, 0x7, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { BaseIndex } +prefetchit1, 0xf18, 0x6, CpuPREFETCHI|Cpu64, Modrm|Anysize|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { BaseIndex } + +// PREFETCHI instructions end. -- cgit v1.2.1