From 65b48a81404cb058c75c562f7dfdeb74f07eba72 Mon Sep 17 00:00:00 2001 From: Peter Bergner Date: Tue, 28 Feb 2017 12:32:07 -0600 Subject: GDB: Add support for the new set/show disassembler-options commands. This commit adds support to GDB so that it can modify the disassembler-options value that is passed to the disassembler, similar to objdump's -M option. Currently, the only supported targets are ARM, PowerPC and S/390, but adding support for a new target(s) is not difficult. include/ * dis-asm.h (disasm_options_t): New typedef. (parse_arm_disassembler_option): Remove prototype. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (get_arm_regname_num_options): Likewise. (disassemble_init_s390): New prototype. (disassembler_options_powerpc): Likewise. (disassembler_options_arm): Likewise. (disassembler_options_s390): Likewise. (remove_whitespace_and_extra_commas): Likewise. (disassembler_options_cmp): Likewise. (next_disassembler_option): New inline function. (FOR_EACH_DISASSEMBLER_OPTION): New macro. opcodes/ * disassemble.c Include "safe-ctype.h". (disassemble_init_for_target): Handle s390 init. (remove_whitespace_and_extra_commas): New function. (disassembler_options_cmp): Likewise. * arm-dis.c: Include "libiberty.h". (NUM_ELEM): Delete. (regnames): Use long disassembler style names. Add force-thumb and no-force-thumb options. (NUM_ARM_REGNAMES): Rename from this... (NUM_ARM_OPTIONS): ...to this. Use ARRAY_SIZE. (get_arm_regname_num_options): Delete. (set_arm_regname_option): Likewise. (get_arm_regnames): Likewise. (parse_disassembler_options): Likewise. (parse_arm_disassembler_option): Rename from this... (parse_arm_disassembler_options): ...to this. Make static. Use new FOR_EACH_DISASSEMBLER_OPTION macro to scan over options. (print_insn): Use parse_arm_disassembler_options. (disassembler_options_arm): New function. (print_arm_disassembler_options): Handle updated regnames. * ppc-dis.c: Include "libiberty.h". (ppc_opts): Add "32" and "64" entries. (ppc_parse_cpu): Use ARRAY_SIZE and disassembler_options_cmp. (powerpc_init_dialect): Add break to switch statement. Use new FOR_EACH_DISASSEMBLER_OPTION macro. (disassembler_options_powerpc): New function. (print_ppc_disassembler_options): Use ARRAY_SIZE. Remove printing of "32" and "64". * s390-dis.c: Include "libiberty.h". (init_flag): Remove unneeded variable. (struct s390_options_t): New structure type. (options): New structure. (init_disasm): Rename from this... (disassemble_init_s390): ...to this. Add initializations for current_arch_mask and option_use_insn_len_bits_p. Remove init_flag. (print_insn_s390): Delete call to init_disasm. (disassembler_options_s390): New function. (print_s390_disassembler_options): Print using information from struct 'options'. * po/opcodes.pot: Regenerate. binutils/ * objdump.c (main): Use remove_whitespace_and_extra_commas. gdb/ * NEWS: Mention new set/show disassembler-options commands. * doc/gdb.texinfo: Document new set/show disassembler-options commands. * disasm.c: Include "arch-utils.h", "gdbcmd.h" and "safe-ctype.h". (prospective_options): New static variable. (gdb_disassembler::gdb_disassembler): Initialize m_di.disassembler_options. (gdb_buffered_insn_length_init_dis): Initilize di->disassembler_options. (get_disassembler_options): New function. (set_disassembler_options): Likewise. (set_disassembler_options_sfunc): Likewise. (show_disassembler_options_sfunc): Likewise. (disassembler_options_completer): Likewise. (_initialize_disasm): Likewise. * disasm.h (get_disassembler_options): New prototype. (set_disassembler_options): Likewise. * gdbarch.sh (gdbarch_disassembler_options): New variable. (gdbarch_verify_disassembler_options): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Likewise. * arm-tdep.c (num_disassembly_options): Delete. (set_disassembly_style): Likewise. (arm_disassembler_options): New static variable. (set_disassembly_style_sfunc): Convert short style name into long option name. Call set_disassembler_options. (show_disassembly_style_sfunc): New function. (arm_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. (_initialize_arm_tdep): Delete regnames variable and update callers. (arm_disassembler_options): Initialize. (disasm_options): New variable. (num_disassembly_options): Rename from this... (num_disassembly_styles): ...to this. Compute by scanning through disasm_options. (valid_disassembly_styles): Initialize using disasm_options. Remove calls to parse_arm_disassembler_option, get_arm_regnames and set_arm_regname_option. Pass show_disassembly_style_sfunc to the "disassembler" setshow command. * rs6000-tdep.c (powerpc_disassembler_options): New static variable. (rs6000_gdbarch_init): Call set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. * s390-tdep.c (s390_disassembler_options): New static variable. (s390_gdbarch_init):all set_gdbarch_disassembler_options and set_gdbarch_verify_disassembler_options. gdb/testsuite/ * gdb.arch/powerpc-power.exp: Delete test. * gdb.arch/powerpc-power.s: Likewise. * gdb.disasm/disassembler-options.exp: New test. * gdb.arch/powerpc-altivec.exp: Likewise. * gdb.arch/powerpc-altivec.s: Likewise. * gdb.arch/powerpc-altivec2.exp: Likewise. * gdb.arch/powerpc-altivec2.s: Likewise. * gdb.arch/powerpc-altivec3.exp: Likewise. * gdb.arch/powerpc-altivec3.s: Likewise. * gdb.arch/powerpc-power7.exp: Likewise. * gdb.arch/powerpc-power7.s: Likewise. * gdb.arch/powerpc-power8.exp: Likewise. * gdb.arch/powerpc-power8.s: Likewise. * gdb.arch/powerpc-power9.exp: Likewise. * gdb.arch/powerpc-power9.s: Likewise. * gdb.arch/powerpc-vsx.exp: Likewise. * gdb.arch/powerpc-vsx.s: Likewise. * gdb.arch/powerpc-vsx2.exp: Likewise. * gdb.arch/powerpc-vsx2.s: Likewise. * gdb.arch/powerpc-vsx3.exp: Likewise. * gdb.arch/powerpc-vsx3.s: Likewise. * gdb.arch/arm-disassembler-options.exp: Likewise. * gdb.arch/powerpc-disassembler-options.exp: Likewise. * gdb.arch/s390-disassembler-options.exp: Likewise. --- opcodes/arm-dis.c | 169 ++++++++++++++++++++++++------------------------------ 1 file changed, 74 insertions(+), 95 deletions(-) (limited to 'opcodes/arm-dis.c') diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 2987403fbfa..e4f99b82351 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -26,6 +26,7 @@ #include "opcode/arm.h" #include "opintl.h" #include "safe-ctype.h" +#include "libiberty.h" #include "floatformat.h" /* FIXME: This shouldn't be done here. */ @@ -41,10 +42,6 @@ #define strneq(a,b,n) (strncmp ((a), (b), (n)) == 0) #endif -#ifndef NUM_ELEM -#define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0]) -#endif - /* Cached mapping symbol state. */ enum map_type { @@ -3198,18 +3195,20 @@ arm_regname; static const arm_regname regnames[] = { - { "raw" , "Select raw register names", + { "reg-names-raw", N_("Select raw register names"), { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}}, - { "gcc", "Select register names used by GCC", + { "reg-names-gcc", N_("Select register names used by GCC"), { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }}, - { "std", "Select register names used in ARM's ISA documentation", + { "reg-names-std", N_("Select register names used in ARM's ISA documentation"), { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc" }}, - { "apcs", "Select register names used in the APCS", + { "force-thumb", N_("Assume all insns are Thumb insns"), {NULL} }, + { "no-force-thumb", N_("Examine preceding label to determine an insn's type"), {NULL} }, + { "reg-names-apcs", N_("Select register names used in the APCS"), { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc" }}, - { "atpcs", "Select register names used in the ATPCS", + { "reg-names-atpcs", N_("Select register names used in the ATPCS"), { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "IP", "SP", "LR", "PC" }}, - { "special-atpcs", "Select special register names used in the ATPCS", - { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }}, + { "reg-names-special-atpcs", N_("Select special register names used in the ATPCS"), + { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }} }; static const char *const iwmmxt_wwnames[] = @@ -3235,7 +3234,7 @@ static const char *const iwmmxt_cregnames[] = /* Default to GCC register name set. */ static unsigned int regname_selected = 1; -#define NUM_ARM_REGNAMES NUM_ELEM (regnames) +#define NUM_ARM_OPTIONS ARRAY_SIZE (regnames) #define arm_regnames regnames[regname_selected].reg_names static bfd_boolean force_thumb = FALSE; @@ -3254,31 +3253,6 @@ static bfd_vma ifthen_address; /* Functions. */ -int -get_arm_regname_num_options (void) -{ - return NUM_ARM_REGNAMES; -} - -int -set_arm_regname_option (int option) -{ - int old = regname_selected; - regname_selected = option; - return old; -} - -int -get_arm_regnames (int option, - const char **setname, - const char **setdescription, - const char *const **register_names) -{ - *setname = regnames[option].name; - *setdescription = regnames[option].description; - *register_names = regnames[option].reg_names; - return 16; -} /* Decode a bitfield of the form matching regexp (N(-N)?,)*N(-N)?. Returns pointer to following character of the format string and @@ -6124,64 +6098,39 @@ arm_symbol_is_valid (asymbol * sym, return (name && *name != '$' && strncmp (name, "__tagsym$$", 10)); } -/* Parse an individual disassembler option. */ +/* Parse the string of disassembler options. */ -void -parse_arm_disassembler_option (char *option) +static void +parse_arm_disassembler_options (char *options) { - if (option == NULL) - return; + char *opt; - if (CONST_STRNEQ (option, "reg-names-")) + FOR_EACH_DISASSEMBLER_OPTION (opt, options) { - int i; - - option += 10; - - for (i = NUM_ARM_REGNAMES; i--;) - if (strneq (option, regnames[i].name, strlen (regnames[i].name))) - { - regname_selected = i; - break; - } + if (CONST_STRNEQ (opt, "reg-names-")) + { + unsigned int i; + for (i = 0; i < NUM_ARM_OPTIONS; i++) + if (disassembler_options_cmp (opt, regnames[i].name) == 0) + { + regname_selected = i; + break; + } - if (i < 0) - /* XXX - should break 'option' at following delimiter. */ - fprintf (stderr, _("Unrecognised register name set: %s\n"), option); + if (i >= NUM_ARM_OPTIONS) + fprintf (stderr, _("Unrecognised register name set: %s\n"), opt); + } + else if (CONST_STRNEQ (opt, "force-thumb")) + force_thumb = 1; + else if (CONST_STRNEQ (opt, "no-force-thumb")) + force_thumb = 0; + else + fprintf (stderr, _("Unrecognised disassembler option: %s\n"), opt); } - else if (CONST_STRNEQ (option, "force-thumb")) - force_thumb = 1; - else if (CONST_STRNEQ (option, "no-force-thumb")) - force_thumb = 0; - else - /* XXX - should break 'option' at following delimiter. */ - fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option); return; } -/* Parse the string of disassembler options, spliting it at whitespaces - or commas. (Whitespace separators supported for backwards compatibility). */ - -static void -parse_disassembler_options (char *options) -{ - if (options == NULL) - return; - - while (*options) - { - parse_arm_disassembler_option (options); - - /* Skip forward to next seperator. */ - while ((*options) && (! ISSPACE (*options)) && (*options != ',')) - ++ options; - /* Skip forward past seperators. */ - while (ISSPACE (*options) || (*options == ',')) - ++ options; - } -} - static bfd_boolean mapping_symbol_for_insn (bfd_vma pc, struct disassemble_info *info, enum map_type *map_symbol); @@ -6473,7 +6422,7 @@ print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little) if (info->disassembler_options) { - parse_disassembler_options (info->disassembler_options); + parse_arm_disassembler_options (info->disassembler_options); /* To avoid repeated parsing of these options, we remove them here. */ info->disassembler_options = NULL; @@ -6842,21 +6791,51 @@ print_insn_little_arm (bfd_vma pc, struct disassemble_info *info) return print_insn (pc, info, TRUE); } +const disasm_options_t * +disassembler_options_arm (void) +{ + static disasm_options_t *opts = NULL; + + if (opts == NULL) + { + unsigned int i; + opts = XNEW (disasm_options_t); + opts->name = XNEWVEC (const char *, NUM_ARM_OPTIONS + 1); + opts->description = XNEWVEC (const char *, NUM_ARM_OPTIONS + 1); + for (i = 0; i < NUM_ARM_OPTIONS; i++) + { + opts->name[i] = regnames[i].name; + if (regnames[i].description != NULL) + opts->description[i] = _(regnames[i].description); + else + opts->description[i] = NULL; + } + /* The array we return must be NULL terminated. */ + opts->name[i] = NULL; + opts->description[i] = NULL; + } + + return opts; +} + void print_arm_disassembler_options (FILE *stream) { - int i; - + unsigned int i, max_len = 0; fprintf (stream, _("\n\ The following ARM specific disassembler options are supported for use with\n\ the -M switch:\n")); - for (i = NUM_ARM_REGNAMES; i--;) - fprintf (stream, " reg-names-%s %*c%s\n", - regnames[i].name, - (int)(14 - strlen (regnames[i].name)), ' ', - regnames[i].description); + for (i = 0; i < NUM_ARM_OPTIONS; i++) + { + unsigned int len = strlen (regnames[i].name); + if (max_len < len) + max_len = len; + } - fprintf (stream, " force-thumb Assume all insns are Thumb insns\n"); - fprintf (stream, " no-force-thumb Examine preceding label to determine an insn's type\n\n"); + for (i = 0, max_len++; i < NUM_ARM_OPTIONS; i++) + fprintf (stream, " %s%*c %s\n", + regnames[i].name, + (int)(max_len - strlen (regnames[i].name)), ' ', + _(regnames[i].description)); } -- cgit v1.2.1