From db3c06bf93f577b9eb40e2cc5d67bfd0671d3c11 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 30 Mar 2023 11:09:07 +0100 Subject: aarch64: Add an operand class for SVE register lists SVE register lists were classified as SVE_REG, since there had been no particular reason to separate them out. However, some SME2 instructions have tied register list operands, and so we need to distinguish registers and register lists when checking whether two operands match. Also, the register list operands used a general error message, even though we already have a dedicated error code for register lists that are the wrong length. --- include/opcode/aarch64.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 6615dec41a7..d09897f48d4 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -224,6 +224,7 @@ enum aarch64_operand_class AARCH64_OPND_CLASS_SISD_REG, AARCH64_OPND_CLASS_SIMD_REGLIST, AARCH64_OPND_CLASS_SVE_REG, + AARCH64_OPND_CLASS_SVE_REGLIST, AARCH64_OPND_CLASS_PRED_REG, AARCH64_OPND_CLASS_ZA_ACCESS, AARCH64_OPND_CLASS_ADDRESS, -- cgit v1.2.1