From dfc12f9f533ea0614ad655370c5f8373081b0c61 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 30 Mar 2023 11:09:17 +0100 Subject: aarch64: Add new SVE dot-product instructions This patch adds the SVE FDOT, SDOT and UDOT instructions, which are available when FEAT_SME2 is implemented. The patch also reorders the existing SVE_Zm3_22_INDEX to keep the operands numerically sorted. --- gas/testsuite/gas/aarch64/sve-invalid.l | 16 ++------ gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d | 3 ++ gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l | 17 ++++++++ gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s | 15 +++++++ gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d | 3 ++ gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l | 40 ++++++++++++++++++ gas/testsuite/gas/aarch64/sve2-sme2-4.d | 54 +++++++++++++++++++++++++ gas/testsuite/gas/aarch64/sve2-sme2-4.s | 49 ++++++++++++++++++++++ 8 files changed, 185 insertions(+), 12 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.d create mode 100644 gas/testsuite/gas/aarch64/sve2-sme2-4.s (limited to 'gas/testsuite/gas/aarch64') diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l index a02fbfe28ef..3dcb06341e5 100644 --- a/gas/testsuite/gas/aarch64/sve-invalid.l +++ b/gas/testsuite/gas/aarch64/sve-invalid.l @@ -1155,14 +1155,10 @@ .*: Info: sdot z0\.d, z1\.h, z2\.h .*: Error: operand mismatch -- `sdot z0\.h,z1\.h,z2\.h' .*: Info: did you mean this\? -.*: Info: sdot z0\.d, z1\.h, z2\.h -.*: Info: other valid variant\(s\): -.*: Info: sdot z0\.s, z1\.b, z2\.b +.*: Info: sdot z0\.s, z1\.h, z2\.h .*: Error: operand mismatch -- `sdot z0\.s,z1\.s,z2\.s' .*: Info: did you mean this\? -.*: Info: sdot z0\.s, z1\.b, z2\.b -.*: Info: other valid variant\(s\): -.*: Info: sdot z0\.d, z1\.h, z2\.h +.*: Info: sdot z0\.s, z1\.h, z2\.h .*: Error: operand mismatch -- `sdot z0\.d,z1\.d,z2\.d' .*: Info: did you mean this\? .*: Info: sdot z0\.d, z1\.h, z2\.h @@ -1187,14 +1183,10 @@ .*: Info: udot z0\.d, z1\.h, z2\.h .*: Error: operand mismatch -- `udot z0\.h,z1\.h,z2\.h' .*: Info: did you mean this\? -.*: Info: udot z0\.d, z1\.h, z2\.h -.*: Info: other valid variant\(s\): -.*: Info: udot z0\.s, z1\.b, z2\.b +.*: Info: udot z0\.s, z1\.h, z2\.h .*: Error: operand mismatch -- `udot z0\.s,z1\.s,z2\.s' .*: Info: did you mean this\? -.*: Info: udot z0\.s, z1\.b, z2\.b -.*: Info: other valid variant\(s\): -.*: Info: udot z0\.d, z1\.h, z2\.h +.*: Info: udot z0\.s, z1\.h, z2\.h .*: Error: operand mismatch -- `udot z0\.d,z1\.d,z2\.d' .*: Info: did you mean this\? .*: Info: udot z0\.d, z1\.h, z2\.h diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d new file mode 100644 index 00000000000..c7d6255c81c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme2 +#source: sve2-sme2-4-invalid.s +#error_output: sve2-sme2-4-invalid.l diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l new file mode 100644 index 00000000000..faa67b7b794 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.l @@ -0,0 +1,17 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fdot 0,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fdot z0\.s,0,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fdot z0\.s,z0\.h,0' +[^ :]+:[0-9]+: Error: z0-z7 expected at operand 3 -- `fdot z0\.s,z0\.h,z8\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fdot z0\.s,z0\.h,z0\.h\[4\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.h,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Error: operand mismatch -- `fdot z0\.d,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Info: did you mean this\? +[^ :]+:[0-9]+: Info: fdot z0\.s, z0\.h, z0\.h\[0\] +[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' used as input at operand 2 -- `fdot z0\.s,z0\.h,z1\.h\[0\]' +[^ :]+:[0-9]+: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `fdot z0\.s,z1\.h,z2\.h\[0\]' +[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]' +[^ :]+:[0-9]+: Warning: predicated instruction expected after `movprfx' -- `fdot z0\.s,z1\.h,z2\.h\[0\]' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s new file mode 100644 index 00000000000..61cc5717dd0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-invalid.s @@ -0,0 +1,15 @@ + fdot 0, z0.h, z0.h[0] + fdot z0.s, 0, z0.h[0] + fdot z0.s, z0.h, 0 + + fdot z0.s, z0.h, z8.h[0] + fdot z0.s, z0.h, z0.h[-1] + fdot z0.s, z0.h, z0.h[4] + fdot z0.h, z0.h, z0.h[0] + fdot z0.d, z0.h, z0.h[0] + + movprfx z0, z1; fdot z0.s, z0.h, z1.h[0] + movprfx z0, z1; fdot z0.s, z1.h, z0.h[0] + movprfx z3, z4; fdot z0.s, z1.h, z2.h[0] + movprfx z0.s, p0/m, z1.s; fdot z0.s, z1.h, z2.h[0] + movprfx z0.s, p0/z, z1.s; fdot z0.s, z1.h, z2.h[0] diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d new file mode 100644 index 00000000000..1afb0c45801 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sve2-sme2-4.s +#error_output: sve2-sme2-4-noarch.l diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l new file mode 100644 index 00000000000..0eeae8bd345 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4-noarch.l @@ -0,0 +1,40 @@ +[^ :]+: Assembler messages: +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot Z0\.S,Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z7\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z1\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z31\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z14\.s,z26\.h,z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot z0\.s,z1\.h,z2\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot Z0\.S,Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z7\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z1\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z31\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z14\.s,z26\.h,z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot z0\.s,z1\.h,z2\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot Z0\.S,Z0\.H,Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z7\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z1\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z31\.s,z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z14\.s,z26\.h,z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot z0\.s,z1\.h,z2\.h' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.d b/gas/testsuite/gas/aarch64/sve2-sme2-4.d new file mode 100644 index 00000000000..b7bf3afbcad --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.d @@ -0,0 +1,54 @@ +#as: -march=armv8-a+sme2 +#objdump: -dr + +[^:]+: file format .* + + +[^:]+: + +[^:]+: +[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 64204000 fdot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 6420401f fdot z31\.s, z0\.h, z0\.h\[0\] +[^:]+: 642043e0 fdot z0\.s, z31\.h, z0\.h\[0\] +[^:]+: 64274000 fdot z0\.s, z0\.h, z7\.h\[0\] +[^:]+: 64384000 fdot z0\.s, z0\.h, z0\.h\[3\] +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 64214020 fdot z0\.s, z1\.h, z1\.h\[0\] +[^:]+: 64208000 fdot z0\.s, z0\.h, z0\.h +[^:]+: 6420801f fdot z31\.s, z0\.h, z0\.h +[^:]+: 642083e0 fdot z0\.s, z31\.h, z0\.h +[^:]+: 643f8000 fdot z0\.s, z0\.h, z31\.h +[^:]+: 6429834e fdot z14\.s, z26\.h, z9\.h +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 64228020 fdot z0\.s, z1\.h, z2\.h +[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480c800 sdot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480c81f sdot z31\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480cbe0 sdot z0\.s, z31\.h, z0\.h\[0\] +[^:]+: 4487c800 sdot z0\.s, z0\.h, z7\.h\[0\] +[^:]+: 4498c800 sdot z0\.s, z0\.h, z0\.h\[3\] +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 4481c820 sdot z0\.s, z1\.h, z1\.h\[0\] +[^:]+: 4400c800 sdot z0\.s, z0\.h, z0\.h +[^:]+: 4400c81f sdot z31\.s, z0\.h, z0\.h +[^:]+: 4400cbe0 sdot z0\.s, z31\.h, z0\.h +[^:]+: 441fc800 sdot z0\.s, z0\.h, z31\.h +[^:]+: 4409cb4e sdot z14\.s, z26\.h, z9\.h +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 4402c820 sdot z0\.s, z1\.h, z2\.h +[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480cc00 udot z0\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480cc1f udot z31\.s, z0\.h, z0\.h\[0\] +[^:]+: 4480cfe0 udot z0\.s, z31\.h, z0\.h\[0\] +[^:]+: 4487cc00 udot z0\.s, z0\.h, z7\.h\[0\] +[^:]+: 4498cc00 udot z0\.s, z0\.h, z0\.h\[3\] +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 4481cc20 udot z0\.s, z1\.h, z1\.h\[0\] +[^:]+: 4400cc00 udot z0\.s, z0\.h, z0\.h +[^:]+: 4400cc1f udot z31\.s, z0\.h, z0\.h +[^:]+: 4400cfe0 udot z0\.s, z31\.h, z0\.h +[^:]+: 441fcc00 udot z0\.s, z0\.h, z31\.h +[^:]+: 4409cf4e udot z14\.s, z26\.h, z9\.h +[^:]+: 0420bc20 movprfx z0, z1 +[^:]+: 4402cc20 udot z0\.s, z1\.h, z2\.h diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-4.s b/gas/testsuite/gas/aarch64/sve2-sme2-4.s new file mode 100644 index 00000000000..1f823238726 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sve2-sme2-4.s @@ -0,0 +1,49 @@ + fdot z0.s, z0.h, z0.h[0] + FDOT Z0.S, Z0.H, Z0.H[0] + fdot z31.s, z0.h, z0.h[0] + fdot z0.s, z31.h, z0.h[0] + fdot z0.s, z0.h, z7.h[0] + fdot z0.s, z0.h, z0.h[3] + + movprfx z0, z1; fdot z0.s, z1.h, z1.h[0] + + fdot z0.s, z0.h, z0.h + fdot z31.s, z0.h, z0.h + fdot z0.s, z31.h, z0.h + fdot z0.s, z0.h, z31.h + fdot z14.s, z26.h, z9.h + + movprfx z0, z1; fdot z0.s, z1.h, z2.h + + sdot z0.s, z0.h, z0.h[0] + SDOT Z0.S, Z0.H, Z0.H[0] + sdot z31.s, z0.h, z0.h[0] + sdot z0.s, z31.h, z0.h[0] + sdot z0.s, z0.h, z7.h[0] + sdot z0.s, z0.h, z0.h[3] + + movprfx z0, z1; sdot z0.s, z1.h, z1.h[0] + + sdot z0.s, z0.h, z0.h + sdot z31.s, z0.h, z0.h + sdot z0.s, z31.h, z0.h + sdot z0.s, z0.h, z31.h + sdot z14.s, z26.h, z9.h + + movprfx z0, z1; sdot z0.s, z1.h, z2.h + udot z0.s, z0.h, z0.h[0] + UDOT Z0.S, Z0.H, Z0.H[0] + udot z31.s, z0.h, z0.h[0] + udot z0.s, z31.h, z0.h[0] + udot z0.s, z0.h, z7.h[0] + udot z0.s, z0.h, z0.h[3] + + movprfx z0, z1; udot z0.s, z1.h, z1.h[0] + + udot z0.s, z0.h, z0.h + udot z31.s, z0.h, z0.h + udot z0.s, z31.h, z0.h + udot z0.s, z0.h, z31.h + udot z14.s, z26.h, z9.h + + movprfx z0, z1; udot z0.s, z1.h, z2.h -- cgit v1.2.1