From 07d6d2b8345ef3dc82eab49635acac9ee67dbb18 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 6 Dec 2017 09:26:00 +1030 Subject: BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate. --- bfd/elf32-nds32.c | 154 +++++++++++++++++++++++++++--------------------------- 1 file changed, 77 insertions(+), 77 deletions(-) (limited to 'bfd/elf32-nds32.c') diff --git a/bfd/elf32-nds32.c b/bfd/elf32-nds32.c index 80765c74650..ad95370c4be 100644 --- a/bfd/elf32-nds32.c +++ b/bfd/elf32-nds32.c @@ -113,32 +113,32 @@ enum /* The first entry in a procedure linkage table are reserved, and the initial contents are unimportant (we zero them out). Subsequent entries look like this. */ -#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */ -#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */ -#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */ -#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */ -#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */ +#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */ +#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */ +#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */ +#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */ +#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */ /* $ta is change to $r15 (from $r25). */ #define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */ -#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */ -#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */ -#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */ -#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */ -#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */ - -#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */ -#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */ -#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */ -#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */ -#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */ +#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */ +#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */ +#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */ +#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */ +#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */ + +#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */ +#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */ +#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */ +#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */ +#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */ #define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */ -#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */ -#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */ -#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */ -#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */ -#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */ +#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */ +#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */ +#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */ +#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */ +#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */ /* These are macros used to get the relocation accurate value. */ #define ACCURATE_8BIT_S1 (0x100) @@ -4350,14 +4350,14 @@ dtpoff_base (struct bfd_link_info *info) } static bfd_boolean -nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED, +nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED, struct bfd_link_info * info, - bfd * input_bfd, - asection * input_section, - bfd_byte * contents, - Elf_Internal_Rela * relocs, - Elf_Internal_Sym * local_syms, - asection ** local_sections) + bfd * input_bfd, + asection * input_section, + bfd_byte * contents, + Elf_Internal_Rela * relocs, + Elf_Internal_Sym * local_syms, + asection ** local_sections) { Elf_Internal_Shdr *symtab_hdr; struct elf_link_hash_entry **sym_hashes; @@ -8803,19 +8803,19 @@ nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, { /* There are 3 variations for LONGCALL1 case 4-4-2; 16-bit on, optimize off or optimize for space - sethi ta, hi20(symbol) ; LONGCALL1/HI20 + sethi ta, hi20(symbol) ; LONGCALL1/HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral5 ta ; + jral5 ta ; case 4-4-4; 16-bit off, optimize don't care - sethi ta, hi20(symbol) ; LONGCALL1/HI20 + sethi ta, hi20(symbol) ; LONGCALL1/HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral ta ; + jral ta ; case 4-4-4; 16-bit on, optimize for speed - sethi ta, hi20(symbol) ; LONGCALL1/HI20 + sethi ta, hi20(symbol) ; LONGCALL1/HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral ta ; + jral ta ; Check code for -mlong-calls output. */ /* Get the reloc for the address from which the register is @@ -8984,24 +8984,24 @@ nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, { /* There are 3 variations for LONGCALL3 case 4-4-4-2; 16-bit on, optimize off or optimize for space - bltz rt, $1 ; LONGCALL3 - sethi ta, hi20(symbol) ; HI20 + bltz rt, $1 ; LONGCALL3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral5 ta ; + jral5 ta ; $1 case 4-4-4-4; 16-bit off, optimize don't care - bltz rt, $1 ; LONGCALL3 - sethi ta, hi20(symbol) ; HI20 + bltz rt, $1 ; LONGCALL3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral ta ; + jral ta ; $1 case 4-4-4-4; 16-bit on, optimize for speed - bltz rt, $1 ; LONGCALL3 - sethi ta, hi20(symbol) ; HI20 + bltz rt, $1 ; LONGCALL3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jral ta ; + jral ta ; $1 */ /* Get the reloc for the address from which the register is @@ -9122,19 +9122,19 @@ nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, { /* There are 3 variations for LONGJUMP1 case 4-4-2; 16-bit bit on, optimize off or optimize for space - sethi ta, hi20(symbol) ; LONGJUMP1/HI20 - ori ta, ta, lo12(symbol) ; LO12S0 - jr5 ta ; + sethi ta, hi20(symbol) ; LONGJUMP1/HI20 + ori ta, ta, lo12(symbol) ; LO12S0 + jr5 ta ; case 4-4-4; 16-bit off, optimize don't care - sethi ta, hi20(symbol) ; LONGJUMP1/HI20 - ori ta, ta, lo12(symbol) ; LO12S0 - jr ta ; + sethi ta, hi20(symbol) ; LONGJUMP1/HI20 + ori ta, ta, lo12(symbol) ; LO12S0 + jr ta ; case 4-4-4; 16-bit on, optimize for speed - sethi ta, hi20(symbol) ; LONGJUMP1/HI20 - ori ta, ta, lo12(symbol) ; LO12S0 - jr ta ; */ + sethi ta, hi20(symbol) ; LONGJUMP1/HI20 + ori ta, ta, lo12(symbol) ; LO12S0 + jr ta ; */ /* Get the reloc for the address from which the register is being loaded. This reloc will tell us which function is @@ -9476,42 +9476,42 @@ nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel, /* There are 5 variations for LONGJUMP3 case 1: 2-4-4-2; 1st insn convertible, 16-bit on, optimize off or optimize for space - bnes38 rt, ra, $1 ; LONGJUMP3 - sethi ta, hi20(symbol) ; HI20 + bnes38 rt, ra, $1 ; LONGJUMP3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jr5 ta ; - $1: ; + jr5 ta ; + $1: ; case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed - bnes38 rt, ra, $1 ; LONGJUMP3 - sethi ta, hi20(symbol) ; HI20 + bnes38 rt, ra, $1 ; LONGJUMP3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jr5 ta ; - $1: ; LABEL + jr5 ta ; + $1: ; LABEL case 3: 4-4-4-2; 1st insn not convertible, 16-bit on, optimize off or optimize for space - bne rt, ra, $1 ; LONGJUMP3 - sethi ta, hi20(symbol) ; HI20 + bne rt, ra, $1 ; LONGJUMP3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jr5 ta ; - $1: ; + jr5 ta ; + $1: ; case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care 16-bit off if no INSN16 - bne rt, ra, $1 ; LONGJUMP3 - sethi ta, hi20(symbol) ; HI20 + bne rt, ra, $1 ; LONGJUMP3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jr ta ; - $1: ; + jr ta ; + $1: ; case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed 16-bit off if no INSN16 - bne rt, ra, $1 ; LONGJUMP3 - sethi ta, hi20(symbol) ; HI20 + bne rt, ra, $1 ; LONGJUMP3 + sethi ta, hi20(symbol) ; HI20 ori ta, ta, lo12(symbol) ; LO12S0 - jr ta ; - $1: ; LABEL */ + jr ta ; + $1: ; LABEL */ /* Get the reloc for the address from which the register is being loaded. This reloc will tell us which function is @@ -10893,9 +10893,9 @@ nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd, Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again) { /* Local TLS non-pic - sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20 + sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12 - add ra, ta, tp ; TLS_LE_ADD */ + add ra, ta, tp ; TLS_LE_ADD */ uint32_t insn; bfd_vma laddr; @@ -15432,7 +15432,7 @@ nds32_elf_ex9_itb_base (struct bfd_link_info *link_info) #define ELF_ARCH bfd_arch_nds32 #define ELF_MACHINE_CODE EM_NDS32 #define ELF_MAXPAGESIZE 0x1000 -#define ELF_TARGET_ID NDS32_ELF_DATA +#define ELF_TARGET_ID NDS32_ELF_DATA #define TARGET_BIG_SYM nds32_elf32_be_vec #define TARGET_BIG_NAME "elf32-nds32be" @@ -15448,7 +15448,7 @@ nds32_elf_ex9_itb_base (struct bfd_link_info *link_info) #define bfd_elf32_bfd_relax_section nds32_elf_relax_section #define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags -#define bfd_elf32_mkobject nds32_elf_mkobject +#define bfd_elf32_mkobject nds32_elf_mkobject #define elf_backend_action_discarded nds32_elf_action_discarded #define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook #define elf_backend_check_relocs nds32_elf_check_relocs @@ -15469,7 +15469,7 @@ nds32_elf_ex9_itb_base (struct bfd_link_info *link_info) #define elf_backend_final_write_processing nds32_elf_final_write_processing #define elf_backend_special_sections nds32_elf_special_sections #define bfd_elf32_bfd_get_relocated_section_contents \ - nds32_elf_get_relocated_section_contents + nds32_elf_get_relocated_section_contents #define elf_backend_can_gc_sections 1 #define elf_backend_can_refcount 1 -- cgit v1.2.1