diff options
Diffstat (limited to 'sim/testsuite/bfin/c_dsp32mult_dr_m.s')
-rw-r--r-- | sim/testsuite/bfin/c_dsp32mult_dr_m.s | 211 |
1 files changed, 211 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/c_dsp32mult_dr_m.s b/sim/testsuite/bfin/c_dsp32mult_dr_m.s new file mode 100644 index 00000000000..3e42caeaf81 --- /dev/null +++ b/sim/testsuite/bfin/c_dsp32mult_dr_m.s @@ -0,0 +1,211 @@ +//Original:/testcases/core/c_dsp32mult_dr_m/c_dsp32mult_dr_m.dsp +// Spec Reference: dsp32mult single dr (mix) MUNOP +# mach: bfin + +.include "testutils.inc" + start + +imm32 r0, 0x34235625; +imm32 r1, 0x9f7a5127; +imm32 r2, 0xa3286725; +imm32 r3, 0x00069027; +imm32 r4, 0xb0abc029; +imm32 r5, 0x10acef2b; +imm32 r6, 0xc00c00de; +imm32 r7, 0xd246712f; +R4.L = R0.L * R0.L; +R5.L = R0.L * R1.H; +R6.L = R1.H * R0.L; +R7.L = R1.H * R1.H; +R0.L = R0.L * R0.L; +R1.L = R0.L * R1.H; +R2.L = R1.H * R0.L; +R3.L = R1.H * R1.H; +CHECKREG r0, 0x342339FA; +CHECKREG r1, 0x9F7AD448; +CHECKREG r2, 0xA328D448; +CHECKREG r3, 0x000648CA; +CHECKREG r4, 0xB0AB39FA; +CHECKREG r5, 0x10ACBF0A; +CHECKREG r6, 0xC00CBF0A; +CHECKREG r7, 0xD24648CA; + +imm32 r0, 0x5b23a635; +imm32 r1, 0x6fba5137; +imm32 r2, 0x1324b735; +imm32 r3, 0x90060037; +imm32 r4, 0x80abcd39; +imm32 r5, 0xb0acef3b; +imm32 r6, 0xa00c003d; +imm32 r7, 0x12467003; +R4.L = R2.H * R2.L; +R5.L = R2.H * R3.H; +R6.L = R3.L * R2.L; +R7.L = R3.L * R3.H; +R0.L = R2.H * R2.L; +R1.L = R2.H * R3.H; +R2.L = R3.L * R2.L; +R3.L = R3.L * R3.H; +CHECKREG r0, 0x5B23F51D; +CHECKREG r1, 0x6FBAEF41; +CHECKREG r2, 0x1324FFE1; +CHECKREG r3, 0x9006FFD0; +CHECKREG r4, 0x80ABF51D; +CHECKREG r5, 0xB0ACEF41; +CHECKREG r6, 0xA00CFFE1; +CHECKREG r7, 0x1246FFD0; + +imm32 r0, 0x1b235655; +imm32 r1, 0xc4ba5157; +imm32 r2, 0x43246755; +imm32 r3, 0x05060055; +imm32 r4, 0x906bc509; +imm32 r5, 0x10a7ef5b; +imm32 r6, 0xb00c805d; +imm32 r7, 0x1246795f; +R0.L = R4.L * R4.L; +R1.L = R4.L * R5.H; +R2.L = R5.H * R4.L; +R3.L = R5.H * R5.H; +R4.L = R4.L * R4.L; +R5.L = R4.L * R5.H; +R6.L = R5.H * R4.L; +R7.L = R5.H * R5.H; +CHECKREG r0, 0x1B231B2A; +CHECKREG r1, 0xC4BAF854; +CHECKREG r2, 0x4324F854; +CHECKREG r3, 0x0506022B; +CHECKREG r4, 0x906B1B2A; +CHECKREG r5, 0x10A70389; +CHECKREG r6, 0xB00C0389; +CHECKREG r7, 0x1246022B; + +imm32 r0, 0xbb235666; +imm32 r1, 0xefba5166; +imm32 r2, 0x13248766; +imm32 r3, 0xf0060066; +imm32 r4, 0x90ab9d69; +imm32 r5, 0x10acef6b; +imm32 r6, 0x800cb06d; +imm32 r7, 0x1246706f; +// test the unsigned U=1 +R0.L = R6.L * R6.L; +R1.L = R6.L * R7.H; +R2.L = R7.H * R6.L; +R3.L = R7.H * R7.H; +R4.L = R6.L * R6.L; +R5.L = R6.L * R7.H; +R6.L = R7.H * R6.L; +R7.L = R7.H * R7.H; +CHECKREG r0, 0xBB233178; +CHECKREG r1, 0xEFBAF4A4; +CHECKREG r2, 0x1324F4A4; +CHECKREG r3, 0xF006029C; +CHECKREG r4, 0x90AB3178; +CHECKREG r5, 0x10ACF4A4; +CHECKREG r6, 0x800CF4A4; +CHECKREG r7, 0x1246029C; + +// mix order +imm32 r0, 0xab23a675; +imm32 r1, 0xcfba5127; +imm32 r2, 0x13246705; +imm32 r3, 0x00060007; +imm32 r4, 0x90abcd09; +imm32 r5, 0x10acdfdb; +imm32 r6, 0x000c000d; +imm32 r7, 0x1246f00f; +R0.L = R0.H * R7.L; +R1.L = R1.H * R6.H; +R2.L = R2.L * R5.L; +R3.L = R3.H * R4.H; +R4.L = R4.L * R3.H; +R5.L = R5.H * R2.L; +R6.L = R6.L * R1.L; +R7.L = R7.H * R0.L; +CHECKREG r0, 0xAB230A92; +CHECKREG r1, 0xCFBAFFFB; +CHECKREG r2, 0x1324E621; +CHECKREG r3, 0x0006FFFB; +CHECKREG r4, 0x90ABFFFE; +CHECKREG r5, 0x10ACFCA1; +CHECKREG r6, 0x000C0000; +CHECKREG r7, 0x12460182; + +imm32 r0, 0xab235a75; +imm32 r1, 0xcfba5127; +imm32 r2, 0x13246905; +imm32 r3, 0x00060007; +imm32 r4, 0x90abcd09; +imm32 r5, 0x10ace9db; +imm32 r6, 0x000c0d0d; +imm32 r7, 0x1246700f; +R0.H = R7.H * R0.H; +R1.H = R6.H * R1.H; +R2.H = R5.H * R2.L; +R3.H = R4.H * R3.H; +R4.H = R3.L * R4.H; +R5.H = R2.H * R5.L; +R6.H = R1.H * R6.H; +R7.H = R0.L * R7.H; +CHECKREG r0, 0xF3E35A75; +CHECKREG r1, 0xFFFB5127; +CHECKREG r2, 0x0DAE6905; +CHECKREG r3, 0xFFFB0007; +CHECKREG r4, 0xFFFACD09; +CHECKREG r5, 0xFDA2E9DB; +CHECKREG r6, 0x00000D0D; +CHECKREG r7, 0x0CEA700F; + +imm32 r0, 0x9b235675; +imm32 r1, 0xc9ba5127; +imm32 r2, 0x13946705; +imm32 r3, 0x00090007; +imm32 r4, 0x90ab9d09; +imm32 r5, 0x10ace9db; +imm32 r6, 0x000c009d; +imm32 r7, 0x12467009; +R2.H = R0.L * R6.L; +R3.H = R1.H * R7.L; +R0.H = R2.L * R0.L; +R1.H = R3.L * R1.H; +R4.H = R4.H * R2.H; +R5.H = R5.L * R3.H; +R6.H = R6.H * R4.L; +R7.H = R7.L * R5.H; +CHECKREG r0, 0x45965675; +CHECKREG r1, 0xFFFD5127; +CHECKREG r2, 0x006A6705; +CHECKREG r3, 0xD07F0007; +CHECKREG r4, 0xFFA49D09; +CHECKREG r5, 0x0838E9DB; +CHECKREG r6, 0xFFF7009D; +CHECKREG r7, 0x07327009; + +imm32 r0, 0xeb235675; +imm32 r1, 0xceba5127; +imm32 r2, 0x13e46705; +imm32 r3, 0x000e0007; +imm32 r4, 0x90abed09; +imm32 r5, 0x10aceedb; +imm32 r6, 0x000c00ed; +imm32 r7, 0x1246700e; +R4.H = R5.L * R2.L; +R6.H = R6.H * R3.H; +R0.H = R7.H * R4.L; +R1.H = R0.H * R5.L; +R2.H = R1.H * R6.H; +R5.H = R2.H * R7.L; +R3.H = R3.H * R0.L; +R7.H = R4.L * R1.H; +CHECKREG r0, 0xFD4B5675; +CHECKREG r1, 0x005D5127; +CHECKREG r2, 0x00006705; +CHECKREG r3, 0x00090007; +CHECKREG r4, 0xF234ED09; +CHECKREG r5, 0x0000EEDB; +CHECKREG r6, 0x000000ED; +CHECKREG r7, 0xFFF2700E; + + +pass |