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authorScott Egerton <scott.egerton@imgtec.com>2018-06-13 15:39:05 +0100
committerMaciej W. Rozycki <macro@mips.com>2018-06-13 15:39:05 +0100
commit730c31740a69eaee73e0fc5430d80daa683c26e7 (patch)
treeecfb431685aa1375d38532ccb2218195f8142050 /include
parenta08ac84b963facb4c4a85c4d5df057d44e2a276d (diff)
downloadbinutils-gdb-730c31740a69eaee73e0fc5430d80daa683c26e7.tar.gz
MIPS: Add CRC ASE support
Add support for the CRC Application Specific Extension for Release 6 of the MIPS Architecture. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 143-148 [2] "MIPS Architecture for Programmers Volume II-A: The MIPS64 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 165-170 ChangeLog: bfd/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * elfxx-mips.c (print_mips_ases): Add CRC. binutils/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * readelf.c (print_mips_ases): Add CRC. gas/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> Maciej W. Rozycki <macro@mips.com> * config/tc-mips.c (options): Add OPTION_CRC and OPTION_NO_CRC. (md_longopts): Likewise. (md_show_usage): Add help for -mcrc and -mno-crc. (mips_ases): Define availability for CRC and CRC64. (mips_convert_ase_flags): Map ASE_CRC to AFL_ASE_CRC. * doc/as.texinfo: Document -mcrc, -mno-crc. * doc/c-mips.texi: Document -mcrc, -mno-crc, .set crc and .set no-crc. * testsuite/gas/mips/ase-errors-1.l: Add error checks for CRC ASE. * testsuite/gas/mips/ase-errors-2.l: Likewise. * testsuite/gas/mips/ase-errors-1.s: Likewise. * testsuite/gas/mips/ase-errors-2.s: Likewise. * testsuite/gas/mips/crc.d: New test. * testsuite/gas/mips/crc64.d: New test. * testsuite/gas/mips/crc-err.d: New test. * testsuite/gas/mips/crc64-err.d: New test. * testsuite/gas/mips/crc-err.l: New test stderr output. * testsuite/gas/mips/crc64-err.l: New test stderr output. * testsuite/gas/mips/crc.s: New test source. * testsuite/gas/mips/crc64.s: New test source. * testsuite/gas/mips/crc-err.s: New test source. * testsuite/gas/mips/crc64-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. include/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * elf/mips.h (AFL_ASE_CRC): New macro. (AFL_ASE_MASK): Update to include AFL_ASE_CRC. * opcode/mips.h (ASE_CRC): New macro. * opcode/mips.h (ASE_CRC64): Likewise. opcodes/ 2018-06-13 Scott Egerton <scott.egerton@imgtec.com> Faraz Shahbazker <Faraz.Shahbazker@mips.com> * mips-dis.c (mips_arch_choices): Add CRC and CRC64 ASEs. * mips-opc.c (CRC, CRC64): New macros. (mips_builtin_opcodes): Define crc32b, crc32h, crc32w, crc32cb, crc32ch and crc32cw for CRC. Define crc32d and crc32cd for CRC64.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog8
-rw-r--r--include/elf/mips.h3
-rw-r--r--include/opcode/mips.h3
3 files changed, 13 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 7d322689413..0b57d2aaa09 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,11 @@
+2018-06-13 Scott Egerton <scott.egerton@imgtec.com>
+ Faraz Shahbazker <Faraz.Shahbazker@mips.com>
+
+ * elf/mips.h (AFL_ASE_CRC): New macro.
+ (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
+ * opcode/mips.h (ASE_CRC): New macro.
+ * opcode/mips.h (ASE_CRC64): Likewise.
+
2018-06-04 Max Filippov <jcmvbkbc@gmail.com>
* elf/xtensa.h (xtensa_read_table_entries)
diff --git a/include/elf/mips.h b/include/elf/mips.h
index 9de0b4e1750..d11b99f3381 100644
--- a/include/elf/mips.h
+++ b/include/elf/mips.h
@@ -1235,7 +1235,8 @@ extern void bfd_mips_elf_swap_abiflags_v0_out
#define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
#define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */
#define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */
-#define AFL_ASE_MASK 0x00007fff /* All ASEs. */
+#define AFL_ASE_CRC 0x00008000 /* CRC ASE. */
+#define AFL_ASE_MASK 0x0000ffff /* All ASEs. */
/* Values for the isa_ext word of an ABI flags structure. */
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index a113893f875..fcc70d56511 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1294,6 +1294,9 @@ static const unsigned int mips_isa_table[] = {
/* The Virtualization ASE has eXtended Physical Addressing (XPA)
instructions which are only valid when both ASEs are enabled. */
#define ASE_XPA_VIRT 0x00020000
+/* Cyclic redundancy check (CRC) ASE. */
+#define ASE_CRC 0x00040000
+#define ASE_CRC64 0x00080000
/* MIPS ISA defines, use instead of hardcoding ISA level. */