Imported from /home/lorry/working-area/delta_VirtualBox/VirtualBox-4.3.10.tar.bz2.HEADVirtualBox-4.3.10master

7 files changed, 219 insertions, 329 deletions

diff --git a/src/VBox/Devices/Bus/DevPCI.cpp b/src/VBox/Devices/Bus/DevPCI.cpp
index 7f799054..c454d8ba 100644
--- a/src/VBox/Devices/Bus/DevPCI.cpp
+++ b/src/VBox/Devices/Bus/DevPCI.cpp
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2006-2007 Oracle Corporation
+ * Copyright (C) 2006-2013 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
@@ -44,7 +44,7 @@
 *   Header Files                                                               *
 *******************************************************************************/
 #define LOG_GROUP LOG_GROUP_DEV_PCI
-/* Hack to get PCIDEVICEINT declare at the right point - include "PCIInternal.h". */
+/* Hack to get PCIDEVICEINT declared at the right point - include "PCIInternal.h". */
 #define PCI_INCLUDE_PRIVATE
 #include <VBox/pci.h>
 #include <VBox/vmm/pdmdev.h>
@@ -178,15 +178,15 @@ typedef PCIGLOBALS *PPCIGLOBALS;
 
 /** Converts a bus instance pointer to a device instance pointer. */
 #define PCIBUS_2_DEVINS(pPciBus)        ((pPciBus)->CTX_SUFF(pDevIns))
-/** Converts a device instance pointer to a PCIGLOBALS pointer. */
+/** Converts a PCI bus device instance pointer to a PCIGLOBALS pointer. */
 #define DEVINS_2_PCIGLOBALS(pDevIns)    ((PPCIGLOBALS)(PDMINS_2_DATA(pDevIns, PPCIGLOBALS)))
-/** Converts a device instance pointer to a PCIBUS pointer. */
+/** Converts a PCI bus device instance pointer to a PCIBUS pointer. */
 #define DEVINS_2_PCIBUS(pDevIns)        ((PPCIBUS)(&PDMINS_2_DATA(pDevIns, PPCIGLOBALS)->PciBus))
 
 /** Converts a pointer to a PCI bus instance to a PCIGLOBALS pointer.
  *  @note This works only if the bus number is 0!!!
  */
-#define PCIBUS_2_PCIGLOBALS(pPciBus)    ( (PPCIGLOBALS)((uintptr_t)(pPciBus) - RT_OFFSETOF(PCIGLOBALS, PciBus)) )
+#define PCIBUS_2_PCIGLOBALS(pPciBus)    RT_FROM_MEMBER(pPciBus, PCIGLOBALS, PciBus)
 
 /** @def PCI_LOCK
  * Acquires the PDM lock. This is a NOP if locking is disabled. */
@@ -221,7 +221,7 @@ PDMBOTHCBDECL(int)  pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPOR
 PDMBOTHCBDECL(int)  pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
 
 #ifdef IN_RING3
-DECLINLINE(PPCIDEVICE) pciFindBridge(PPCIBUS pBus, uint8_t iBus);
+DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus);
 #endif
 
 RT_C_DECLS_END
@@ -241,6 +241,7 @@ RT_C_DECLS_END
 
 
 #ifdef IN_RING3
+
 static void pci_update_mappings(PCIDevice *d)
 {
     PPCIBUS pBus = d->Int.s.CTX_SUFF(pBus);
@@ -500,7 +501,7 @@ static int pci_data_write(PPCIGLOBALS pGlobals, uint32_t addr, uint32_t val, int
         if (pGlobals->PciBus.cBridges)
         {
 #ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
-            PPCIDEVICE pBridgeDevice = pciFindBridge(&pGlobals->PciBus, iBus);
+            PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
             if (pBridgeDevice)
             {
                 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite);
@@ -546,7 +547,7 @@ static int pci_data_read(PPCIGLOBALS pGlobals, uint32_t addr, int len, uint32_t
         if (pGlobals->PciBus.cBridges)
         {
 #ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
-            PPCIDEVICE pBridgeDevice = pciFindBridge(&pGlobals->PciBus, iBus);
+            PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
             if (pBridgeDevice)
             {
                 AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigRead);
@@ -741,14 +742,9 @@ static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE p
     }
 }
 
+
 /**
- * Set the IRQ for a PCI device on the host bus.
- *
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         The PCI device structure.
- * @param   iIrq            IRQ number to set.
- * @param   iLevel          IRQ level.
- * @param   uTagSrc         The IRQ tag and source ID (for tracing).
+ * @interface_method_impl{PDMPCIBUSREG,pfnSetIrq}
  */
 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
 {
@@ -756,6 +752,7 @@ PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq,
 }
 
 #ifdef IN_RING3
+
 /**
  * Finds a bridge on the bus which contains the destination bus.
  *
@@ -764,7 +761,7 @@ PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq,
  * @param  pBus    Pointer to the bus to search on.
  * @param  iBus    Destination bus number.
  */
-DECLINLINE(PPCIDEVICE) pciFindBridge(PPCIBUS pBus, uint8_t iBus)
+DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus)
 {
     /* Search for a fitting bridge. */
     for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++)
@@ -786,7 +783,7 @@ DECLINLINE(PPCIDEVICE) pciFindBridge(PPCIBUS pBus, uint8_t iBus)
     return NULL;
 }
 
-static void piix3_reset(PIIX3State *d)
+static void pciR3Piix3Reset(PIIX3State *d)
 {
     uint8_t *pci_conf = d->dev.config;
 
@@ -1122,18 +1119,11 @@ static void pci_bios_init_device(PPCIGLOBALS pGlobals, uint8_t uBus, uint8_t uDe
 
 #endif /* IN_RING3 */
 
-/* -=-=-=-=-=- wrappers -=-=-=-=-=- */
+
+/* -=-=-=-=-=- I/O ports -=-=-=-=-=- */
 
 /**
- * Port I/O Handler for PCI address OUT operations.
- *
- * @returns VBox status code.
- *
- * @param   pDevIns     The device instance.
- * @param   pvUser      User argument - ignored.
- * @param   uPort       Port number used for the IN operation.
- * @param   u32         The value to output.
- * @param   cb          The value size in bytes.
+ * @callback_method_impl{FNIOMIOPORTOUT, PCI address}
  */
 PDMBOTHCBDECL(int) pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
 {
@@ -1153,15 +1143,7 @@ PDMBOTHCBDECL(int) pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOP
 
 
 /**
- * Port I/O Handler for PCI address IN operations.
- *
- * @returns VBox status code.
- *
- * @param   pDevIns     The device instance.
- * @param   pvUser      User argument - ignored.
- * @param   uPort       Port number used for the IN operation.
- * @param   pu32        Where to store the result.
- * @param   cb          Number of bytes read.
+ * @callback_method_impl{FNIOMIOPORTIN, PCI address}
  */
 PDMBOTHCBDECL(int) pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
 {
@@ -1183,15 +1165,7 @@ PDMBOTHCBDECL(int) pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPO
 
 
 /**
- * Port I/O Handler for PCI data OUT operations.
- *
- * @returns VBox status code.
- *
- * @param   pDevIns     The device instance.
- * @param   pvUser      User argument - ignored.
- * @param   uPort       Port number used for the IN operation.
- * @param   u32         The value to output.
- * @param   cb          The value size in bytes.
+ * @callback_method_impl{FNIOMIOPORTOUT, PCI data}
  */
 PDMBOTHCBDECL(int) pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
 {
@@ -1211,15 +1185,7 @@ PDMBOTHCBDECL(int) pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT
 
 
 /**
- * Port I/O Handler for PCI data IN operations.
- *
- * @returns VBox status code.
- *
- * @param   pDevIns     The device instance.
- * @param   pvUser      User argument - ignored.
- * @param   uPort       Port number used for the IN operation.
- * @param   pu32        Where to store the result.
- * @param   cb          Number of bytes read.
+ * @callback_method_impl{FNIOMIOPORTIN, PCI data}
  */
 PDMBOTHCBDECL(int) pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
 {
@@ -1238,35 +1204,7 @@ PDMBOTHCBDECL(int) pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT
 
 #ifdef IN_RING3
 
-/**
- * Saves a state of the PCI device.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         Pointer to PCI device.
- * @param   pSSM            The handle to save the state to.
- */
-static DECLCALLBACK(int) pciGenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
-{
-    NOREF(pDevIns);
-    return SSMR3PutMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
-}
-
-
-/**
- * Loads a saved PCI device state.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         Pointer to PCI device.
- * @param   pSSM            The handle to the saved state.
- */
-static DECLCALLBACK(int) pciGenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
-{
-    NOREF(pDevIns);
-    return SSMR3GetMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
-}
-
+/* -=-=-=-=-=- Saved state -=-=-=-=-=- */
 
 /**
  * Common worker for pciR3SaveExec and pcibridgeR3SaveExec.
@@ -1298,12 +1236,7 @@ static int pciR3CommonSaveExec(PPCIBUS pBus, PSSMHANDLE pSSM)
 
 
 /**
- * Saves a state of the PCI device.
- *
- * @returns VBox status code.
- * @param   pDevIns     The device instance.
- * @param   pPciDev     Pointer to PCI device.
- * @param   pSSM  The handle to save the state to.
+ * @callback_method_impl{FNSSMDEVSAVEEXEC}
  */
 static DECLCALLBACK(int) pciR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
 {
@@ -1366,10 +1299,10 @@ static void pciR3CommonRestoreConfig(PPCIDEVICE pDev, uint8_t const *pbSrcConfig
         { 0x09, 1, 0, 3, "CLASS_PROG" },
         { 0x0a, 1, 0, 3, "CLASS_SUB" },
         { 0x0b, 1, 0, 3, "CLASS_BASE" },
-        { 0x0c, 1, 0, 3, "CACHE_LINE_SIZE" },   // fWritable = ??
-        { 0x0d, 1, 0, 3, "LATENCY_TIMER" },     // fWritable = ??
-        { 0x0e, 1, 0, 3, "HEADER_TYPE" },       // fWritable = ??
-        { 0x0f, 1, 0, 3, "BIST" },              // fWritable = ??
+        { 0x0c, 1, 1, 3, "CACHE_LINE_SIZE" },
+        { 0x0d, 1, 1, 3, "LATENCY_TIMER" },
+        { 0x0e, 1, 0, 3, "HEADER_TYPE" },
+        { 0x0f, 1, 1, 3, "BIST" },
         { 0x10, 4, 1, 3, "BASE_ADDRESS_0" },
         { 0x14, 4, 1, 3, "BASE_ADDRESS_1" },
         { 0x18, 4, 1, 1, "BASE_ADDRESS_2" },
@@ -1396,13 +1329,13 @@ static void pciR3CommonRestoreConfig(PPCIDEVICE pDev, uint8_t const *pbSrcConfig
         { 0x30, 2, 1, 2, "IO_BASE_UPPER16" },   // fWritable = ?!
         { 0x32, 2, 1, 2, "IO_LIMIT_UPPER16" },  // fWritable = ?!
         { 0x34, 4, 0, 3, "CAPABILITY_LIST" },   // fWritable = !? cb=!?
-        { 0x38, 4, 1, 1, "???" },               // ???
+        { 0x38, 4, 1, 1, "RESERVED_38" },       // ???
         { 0x38, 4, 1, 2, "ROM_ADDRESS_BR" },    // fWritable = !? cb=!? fBridge=!?
         { 0x3c, 1, 1, 3, "INTERRUPT_LINE" },    // fBridge=??
         { 0x3d, 1, 0, 3, "INTERRUPT_PIN" },     // fBridge=??
-        { 0x3e, 1, 0, 1, "MIN_GNT" },           // fWritable = !?
-        { 0x3e, 1, 1, 2, "BRIDGE_CONTROL" },    // fWritable = !? cb=!?
-        { 0x3f, 1, 1, 3, "MAX_LAT" },           // fWritable = !? fBridge=!?
+        { 0x3e, 1, 0, 1, "MIN_GNT" },
+        { 0x3e, 2, 1, 2, "BRIDGE_CONTROL" },    // fWritable = !?
+        { 0x3f, 1, 0, 1, "MAX_LAT" },
         /* The COMMAND register must come last as it requires the *ADDRESS*
            registers to be restored before we pretent to change it from 0 to
            whatever value the guest assigned it. */
@@ -1620,13 +1553,7 @@ static DECLCALLBACK(int) pciR3CommonLoadExec(PPCIBUS pBus, PSSMHANDLE pSSM, uint
 
 
 /**
- * Loads a saved PCI device state.
- *
- * @returns VBox status code.
- * @param   pDevIns     The device instance.
- * @param   pSSM        The handle to the saved state.
- * @param   uVersion    The data unit version number.
- * @param   uPass       The data pass.
+ * @callback_method_impl{FNSSMDEVLOADEXEC}
  */
 static DECLCALLBACK(int) pciR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
 {
@@ -1675,7 +1602,7 @@ static DECLCALLBACK(int) pciR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint
 }
 
 
-/* -=-=-=-=-=- real code -=-=-=-=-=- */
+/* -=-=-=-=-=- PCI Bus Interface Methods (PDMPCIBUSREG) -=-=-=-=-=- */
 
 /**
  * Registers the device with the specified PCI bus.
@@ -1686,7 +1613,7 @@ static DECLCALLBACK(int) pciR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint
  * @param   pPciDev         The PCI device structure.
  * @param   pszName         Pointer to device name (permanent, readonly). For debugging, not unique.
  */
-static int pciRegisterInternal(PPCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const char *pszName)
+static int pciR3RegisterDeviceInternal(PPCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const char *pszName)
 {
     /*
      * Find device slot.
@@ -1818,17 +1745,9 @@ static int pciRegisterInternal(PPCIBUS pBus, int iDev, PPCIDEVICE pPciDev, const
 
 
 /**
- * Registers the device with the default PCI bus.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         The PCI device structure.
- *                          Any PCI enabled device must keep this in it's instance data!
- *                          Fill in the PCI data config before registration, please.
- * @param   pszName         Pointer to device name (permanent, readonly). For debugging, not unique.
- * @param   iDev            The PCI device number. Use a negative value for auto assigning one.
+ * @interface_method_impl{PDMPCIBUSREG,pfnRegister}
  */
-static DECLCALLBACK(int) pciRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)
+static DECLCALLBACK(int) pciR3Register(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)
 {
     PPCIBUS     pBus = DEVINS_2_PCIBUS(pDevIns);
 
@@ -1847,11 +1766,15 @@ static DECLCALLBACK(int) pciRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, con
     /*
      * Register the device.
      */
-    return pciRegisterInternal(pBus, iDev, pPciDev, pszName);
+    return pciR3RegisterDeviceInternal(pBus, iDev, pPciDev, pszName);
 }
 
 
-static DECLCALLBACK(int) pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
+/**
+ * @interface_method_impl{PDMPCIBUSREG,pfnIORegionRegisterR3}
+ */
+static DECLCALLBACK(int) pciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
+                                                     PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
 {
     NOREF(pDevIns);
 
@@ -1892,10 +1815,11 @@ static DECLCALLBACK(int) pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPci
 
 
 /**
- * @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3
+ * @interface_method_impl{PDMPCIBUSREG,pfnSetConfigCallbacksR3}
  */
-static DECLCALLBACK(void) pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
-                                                PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
+static DECLCALLBACK(void)
+pciR3CommonSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
+                              PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
 {
     NOREF(pDevIns);
 
@@ -1910,18 +1834,15 @@ static DECLCALLBACK(void) pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE p
 
 
 /**
- * Called to perform the job of the bios.
- *
- * @returns VBox status.
- * @param   pDevIns     Device instance of the first bus.
+ * @interface_method_impl{PDMPCIBUSREG,pfnFakePCIBIOSR3}
  */
-static DECLCALLBACK(int) pciFakePCIBIOS(PPDMDEVINS pDevIns)
+static DECLCALLBACK(int) pciR3FakePCIBIOS(PPDMDEVINS pDevIns)
 {
     unsigned    i;
-    uint8_t     elcr[2] = {0, 0};
+    uint8_t     elcr[2]  = {0, 0};
     PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
-    PVM         pVM = PDMDevHlpGetVM(pDevIns);
-    Assert(pVM);
+    PVM         pVM      = PDMDevHlpGetVM(pDevIns); Assert(pVM);
+    PVMCPU      pVCpu    = PDMDevHlpGetVMCPU(pDevIns); Assert(pVM);
 
     /*
      * Set the start addresses.
@@ -1943,9 +1864,9 @@ static DECLCALLBACK(int) pciFakePCIBIOS(PPDMDEVINS pDevIns)
     }
 
     /* Tell to the PIC. */
-    VBOXSTRICTRC rcStrict = IOMIOPortWrite(pVM, 0x4d0, elcr[0], sizeof(uint8_t));
+    VBOXSTRICTRC rcStrict = IOMIOPortWrite(pVM, pVCpu, 0x4d0, elcr[0], sizeof(uint8_t));
     if (rcStrict == VINF_SUCCESS)
-        rcStrict = IOMIOPortWrite(pVM, 0x4d1, elcr[1], sizeof(uint8_t));
+        rcStrict = IOMIOPortWrite(pVM, pVCpu, 0x4d1, elcr[1], sizeof(uint8_t));
     if (rcStrict != VINF_SUCCESS)
     {
         AssertMsgFailed(("Writing to PIC failed! rcStrict=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
@@ -1968,28 +1889,24 @@ static DECLCALLBACK(int) pciFakePCIBIOS(PPDMDEVINS pDevIns)
     return VINF_SUCCESS;
 }
 
+
+/* -=-=-=-=-=- Debug Info Handlers -=-=-=-=-=- */
+
 /**
- * Info handler, device version.
- *
- * @param   pDevIns     Device instance which registered the info.
- * @param   pHlp        Callback functions for doing output.
- * @param   pszArgs     Argument string. Optional and specific to the handler.
+ * @callback_method_impl{FNDBGFHANDLERDEV}
  */
-static DECLCALLBACK(void) pciIrqInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
+static DECLCALLBACK(void) pciR3IrqInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
 {
     PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
-    uint16_t    router;
-    uint8_t     irq_map;
-    int         i;
     NOREF(pszArgs);
 
-    router = pGlobals->PIIX3State.dev.devfn;
+    uint16_t router = pGlobals->PIIX3State.dev.devfn;
     pHlp->pfnPrintf(pHlp, "PCI interrupt router at: %02X:%02X:%X\n",
                     router >> 8, (router >> 3) & 0x1f, router & 0x7);
 
-    for (i = 0; i < 4; ++i)
+    for (int i = 0; i < 4; ++i)
     {
-        irq_map = pci_config_readb(pGlobals, 0, router, 0x60 + i);
+        uint8_t irq_map = pci_config_readb(pGlobals, 0, router, 0x60 + i);
         if (irq_map & 0x80)
             pHlp->pfnPrintf(pHlp, "PIRQ%c disabled\n", 'A' + i);
         else
@@ -1997,22 +1914,35 @@ static DECLCALLBACK(void) pciIrqInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, con
     }
 }
 
-static void printIndent(PCDBGFINFOHLP pHlp, int iIndent)
+/**
+ * Outputs indent.
+ *
+ * @param   pHlp        Output helpers.
+ * @param   iIndent     Indentation level.
+ */
+static void pciR3PrintIndent(PCDBGFINFOHLP pHlp, int iIndent)
 {
-    for (int i = 0; i < iIndent; i++)
-    {
+    while (iIndent-- > 0)
         pHlp->pfnPrintf(pHlp, "    ");
-    }
 }
 
-static void pciBusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegisters)
+/**
+ * Recursive worker for pciR3Info.
+ *
+ * @param   pBus        The bus to display.
+ * @param   pHlp        Output helpers.
+ * @param   iIndent     Indentation level.
+ * @param   fRegisters  Whether to also display the PCI configuration registers
+ *                      of each device on the bus.
+ */
+static void pciR3BusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegisters)
 {
     for (uint32_t iDev = 0; iDev < RT_ELEMENTS(pBus->devices); iDev++)
     {
         PPCIDEVICE pPciDev = pBus->devices[iDev];
         if (pPciDev != NULL)
         {
-            printIndent(pHlp, iIndent);
+            pciR3PrintIndent(pHlp, iIndent);
 
             /*
              * For passthrough devices MSI/MSI-X mostly reflects the way interrupts delivered to the guest,
@@ -2061,7 +1991,7 @@ static void pciBusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegi
                         u32Addr &= ~0xf;
                     }
 
-                    printIndent(pHlp, iIndent + 2);
+                    pciR3PrintIndent(pHlp, iIndent + 2);
                     pHlp->pfnPrintf(pHlp, "%s region #%d: %x..%x\n",
                                     pszDesc, iRegion, u32Addr, u32Addr+iRegionSize);
                     if (f64Bit)
@@ -2069,23 +1999,23 @@ static void pciBusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegi
                 }
             }
 
-            printIndent(pHlp, iIndent + 2);
+            pciR3PrintIndent(pHlp, iIndent + 2);
             uint16_t iStatus = PCIDevGetWord(pPciDev, VBOX_PCI_STATUS);
             pHlp->pfnPrintf(pHlp, "Command: %.*Rhxs, Status: %.*Rhxs\n",
                             sizeof(uint16_t), &iCmd, sizeof(uint16_t), &iStatus);
-            printIndent(pHlp, iIndent + 2);
+            pciR3PrintIndent(pHlp, iIndent + 2);
             pHlp->pfnPrintf(pHlp, "Bus master: %s\n",
                             iCmd & VBOX_PCI_COMMAND_MASTER ? "Yes" : "No");
 
             if (fRegisters)
             {
-                printIndent(pHlp, iIndent + 2);
+                pciR3PrintIndent(pHlp, iIndent + 2);
                 pHlp->pfnPrintf(pHlp, "PCI registers:\n");
                 for (int iReg = 0; iReg < 0x100; )
                 {
                     int iPerLine = 0x10;
                     Assert (0x100 % iPerLine == 0);
-                    printIndent(pHlp, iIndent + 3);
+                    pciR3PrintIndent(pHlp, iIndent + 3);
 
                     while (iPerLine-- > 0)
                     {
@@ -2099,45 +2029,39 @@ static void pciBusInfo(PPCIBUS pBus, PCDBGFINFOHLP pHlp, int iIndent, bool fRegi
 
     if (pBus->cBridges > 0)
     {
-        printIndent(pHlp, iIndent);
+        pciR3PrintIndent(pHlp, iIndent);
         pHlp->pfnPrintf(pHlp, "Registered %d bridges, subordinate buses info follows\n", pBus->cBridges);
         for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++)
         {
             PPCIBUS pBusSub = PDMINS_2_DATA(pBus->papBridgesR3[iBridge]->pDevIns, PPCIBUS);
-            pciBusInfo(pBusSub, pHlp, iIndent + 1, fRegisters);
+            pciR3BusInfo(pBusSub, pHlp, iIndent + 1, fRegisters);
         }
     }
 }
 
+
 /**
- * Info handler, device version.
- *
- * @param   pDevIns     Device instance which registered the info.
- * @param   pHlp        Callback functions for doing output.
- * @param   pszArgs     Argument string. Optional and specific to the handler.
+ * @callback_method_impl{FNDBGFHANDLERDEV}
  */
-static DECLCALLBACK(void) pciInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
+static DECLCALLBACK(void) pciR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
 {
     PPCIBUS pBus = DEVINS_2_PCIBUS(pDevIns);
 
-    if (pszArgs == NULL || !strcmp(pszArgs, "basic"))
-    {
-        pciBusInfo(pBus, pHlp, 0, false);
-    }
+    if (pszArgs == NULL || !*pszArgs || !strcmp(pszArgs, "basic"))
+        pciR3BusInfo(pBus, pHlp, 0, false);
     else if (!strcmp(pszArgs, "verbose"))
-    {
-        pciBusInfo(pBus, pHlp, 0, true);
-    }
+        pciR3BusInfo(pBus, pHlp, 0, true);
     else
-    {
         pHlp->pfnPrintf(pHlp, "Invalid argument. Recognized arguments are 'basic', 'verbose'.\n");
-    }
 }
 
+
+/* -=-=-=-=-=- PDMDEVREG  -=-=-=-=-=- */
+
 /**
- * @copydoc FNPDMDEVRELOCATE
+ * @interface_method_impl{PDMDEVREG,pfnRelocate}
  */
-static DECLCALLBACK(void) pciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
+static DECLCALLBACK(void) pciR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
 {
     PPCIGLOBALS pGlobals = PDMINS_2_DATA(pDevIns, PPCIGLOBALS);
     PPCIBUS     pBus     = &pGlobals->PciBus;
@@ -2156,17 +2080,18 @@ static DECLCALLBACK(void) pciRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
 
 
 /**
- * @copydoc FNPDMDEVRESET
+ * @interface_method_impl{PDMDEVREG,pfnReset}
  */
-static DECLCALLBACK(void) pciReset(PPDMDEVINS pDevIns)
+static DECLCALLBACK(void) pciR3Reset(PPDMDEVINS pDevIns)
 {
-    pciFakePCIBIOS(pDevIns);
+    pciR3FakePCIBIOS(pDevIns);
 }
 
+
 /**
  * @interface_method_impl{PDMDEVREG,pfnConstruct}
  */
-static DECLCALLBACK(int)   pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
+static DECLCALLBACK(int)   pciR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
 {
     Assert(iInstance == 0);
     PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
@@ -2216,19 +2141,18 @@ static DECLCALLBACK(int)   pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGM
     pGlobals->PciBus.pDevInsR3 = pDevIns;
     pGlobals->PciBus.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
     pGlobals->PciBus.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
-    pGlobals->PciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) * RT_ELEMENTS(pGlobals->PciBus.devices));
+    pGlobals->PciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns,   sizeof(PPCIDEVICE)
+                                                                                 * RT_ELEMENTS(pGlobals->PciBus.devices));
 
     PDMPCIBUSREG PciBusReg;
     PPCIBUS      pBus = &pGlobals->PciBus;
     PciBusReg.u32Version              = PDM_PCIBUSREG_VERSION;
-    PciBusReg.pfnRegisterR3           = pciRegister;
+    PciBusReg.pfnRegisterR3           = pciR3Register;
     PciBusReg.pfnRegisterMsiR3        = NULL;
-    PciBusReg.pfnIORegionRegisterR3   = pciIORegionRegister;
-    PciBusReg.pfnSetConfigCallbacksR3 = pciSetConfigCallbacks;
+    PciBusReg.pfnIORegionRegisterR3   = pciR3CommonIORegionRegister;
+    PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks;
     PciBusReg.pfnSetIrqR3             = pciSetIrq;
-    PciBusReg.pfnSaveExecR3           = pciGenericSaveExec;
-    PciBusReg.pfnLoadExecR3           = pciGenericLoadExec;
-    PciBusReg.pfnFakePCIBIOSR3        = pciFakePCIBIOS;
+    PciBusReg.pfnFakePCIBIOSR3        = pciR3FakePCIBIOS;
     PciBusReg.pszSetIrqRC             = fGCEnabled ? "pciSetIrq" : NULL;
     PciBusReg.pszSetIrqR0             = fR0Enabled ? "pciSetIrq" : NULL;
     rc = PDMDevHlpPCIBusRegister(pDevIns, &PciBusReg, &pBus->pPciHlpR3);
@@ -2260,7 +2184,7 @@ static DECLCALLBACK(int)   pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGM
 
     pBus->PciDev.pDevIns              = pDevIns;
     pciDevSetRequestedDevfunc(&pBus->PciDev);
-    pciRegisterInternal(pBus, 0, &pBus->PciDev, "i440FX");
+    pciR3RegisterDeviceInternal(pBus, 0, &pBus->PciDev, "i440FX");
 
     /* PIIX3 */
     PCIDevSetVendorId(  &pGlobals->PIIX3State.dev, 0x8086); /* Intel */
@@ -2271,8 +2195,8 @@ static DECLCALLBACK(int)   pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGM
 
     pGlobals->PIIX3State.dev.pDevIns      = pDevIns;
     pciDevSetRequestedDevfunc(&pGlobals->PIIX3State.dev);
-    pciRegisterInternal(pBus, 8, &pGlobals->PIIX3State.dev, "PIIX3");
-    piix3_reset(&pGlobals->PIIX3State);
+    pciR3RegisterDeviceInternal(pBus, 8, &pGlobals->PIIX3State.dev, "PIIX3");
+    pciR3Piix3Reset(&pGlobals->PIIX3State);
 
     pBus->iDevSearch = 16;
 
@@ -2311,10 +2235,10 @@ static DECLCALLBACK(int)   pciConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGM
     if (RT_FAILURE(rc))
         return rc;
 
-    PDMDevHlpDBGFInfoRegister(pDevIns, "pci", "Display PCI bus status. Recognizes 'basic' or 'verbose' "
-                                              "as arguments, defaults to 'basic'.", pciInfo);
-
-    PDMDevHlpDBGFInfoRegister(pDevIns, "pciirq", "Display PCI IRQ routing state. (no arguments)", pciIrqInfo);
+    PDMDevHlpDBGFInfoRegister(pDevIns, "pci",
+                              "Display PCI bus status. Recognizes 'basic' or 'verbose' as arguments, defaults to 'basic'.",
+                              pciR3Info);
+    PDMDevHlpDBGFInfoRegister(pDevIns, "pciirq", "Display PCI IRQ routing state. (no arguments)", pciR3IrqInfo);
 
     return VINF_SUCCESS;
 }
@@ -2344,17 +2268,17 @@ const PDMDEVREG g_DevicePCI =
     /* cbInstance */
     sizeof(PCIGLOBALS),
     /* pfnConstruct */
-    pciConstruct,
+    pciR3Construct,
     /* pfnDestruct */
     NULL,
     /* pfnRelocate */
-    pciRelocate,
-    /* pfnIOCtl */
+    pciR3Relocate,
+    /* pfnMemSetup */
     NULL,
     /* pfnPowerOn */
     NULL,
     /* pfnReset */
-    pciReset,
+    pciR3Reset,
     /* pfnSuspend */
     NULL,
     /* pfnResume */
@@ -2378,14 +2302,11 @@ const PDMDEVREG g_DevicePCI =
 #endif /* IN_RING3 */
 
 
+
+/* -=-=-=-=-=- The PCI bridge specific bits -=-=-=-=-=- */
+
 /**
- * Set the IRQ for a PCI device on a secondary bus.
- *
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         The PCI device structure.
- * @param   iIrq            IRQ number to set.
- * @param   iLevel          IRQ level.
- * @param   uTagSrc         The IRQ tag and source ID (for tracing).
+ * @interface_method_impl{PDMPCIBUSREG,pfnSetIrq}
  */
 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
 {
@@ -2418,16 +2339,19 @@ PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int
 
 #ifdef IN_RING3
 
-static void pcibridgeConfigWrite(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, uint32_t u32Value, unsigned cb)
+/**
+ * @callback_method_impl{FNPCIBRIDGECONFIGWRITE}
+ */
+static void pcibridgeR3ConfigWrite(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, uint32_t u32Value, unsigned cb)
 {
     PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
 
-    LogFlowFunc((": pDevIns=%p iBus=%d iDevice=%d u32Address=%u u32Value=%u cb=%d\n", pDevIns, iBus, iDevice, u32Address, u32Value, cb));
+    LogFlowFunc(("pDevIns=%p iBus=%d iDevice=%d u32Address=%u u32Value=%u cb=%d\n", pDevIns, iBus, iDevice, u32Address, u32Value, cb));
 
     /* If the current bus is not the target bus search for the bus which contains the device. */
     if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS])
     {
-        PPCIDEVICE pBridgeDevice = pciFindBridge(pBus, iBus);
+        PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus);
         if (pBridgeDevice)
         {
             AssertPtr(pBridgeDevice->Int.s.pfnBridgeConfigWrite);
@@ -2446,17 +2370,21 @@ static void pcibridgeConfigWrite(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDe
     }
 }
 
-static uint32_t pcibridgeConfigRead(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, unsigned cb)
+
+/**
+ * @callback_method_impl{FNPCIBRIDGECONFIGREAD}
+ */
+static uint32_t pcibridgeR3ConfigRead(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t iDevice, uint32_t u32Address, unsigned cb)
 {
     PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
     uint32_t u32Value = 0xffffffff; /* Return value in case there is no device. */
 
-    LogFlowFunc((": pDevIns=%p iBus=%d iDevice=%d u32Address=%u cb=%d\n", pDevIns, iBus, iDevice, u32Address, cb));
+    LogFlowFunc(("pDevIns=%p iBus=%d iDevice=%d u32Address=%u cb=%d\n", pDevIns, iBus, iDevice, u32Address, cb));
 
     /* If the current bus is not the target bus search for the bus which contains the device. */
     if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS])
     {
-        PPCIDEVICE pBridgeDevice = pciFindBridge(pBus, iBus);
+        PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus);
         if (pBridgeDevice)
         {
             AssertPtr( pBridgeDevice->Int.s.pfnBridgeConfigRead);
@@ -2479,7 +2407,7 @@ static uint32_t pcibridgeConfigRead(PPDMDEVINSR3 pDevIns, uint8_t iBus, uint8_t
 
 
 /**
- * @copydoc FNSSMDEVSAVEEXEC
+ * @callback_method_impl{FNSSMDEVSAVEEXEC}
  */
 static DECLCALLBACK(int) pcibridgeR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
 {
@@ -2489,7 +2417,7 @@ static DECLCALLBACK(int) pcibridgeR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM
 
 
 /**
- * @copydoc FNSSMDEVLOADEXEC
+ * @callback_method_impl{FNSSMDEVLOADEXEC}
  */
 static DECLCALLBACK(int) pcibridgeR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
 {
@@ -2501,17 +2429,9 @@ static DECLCALLBACK(int) pcibridgeR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM
 
 
 /**
- * Registers the device with the default PCI bus.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         The PCI device structure.
- *                          Any PCI enabled device must keep this in it's instance data!
- *                          Fill in the PCI data config before registration, please.
- * @param   pszName         Pointer to device name (permanent, readonly). For debugging, not unique.
- * @param   iDev            The PCI device number. Use a negative value for auto assigning one.
+ * @interface_method_impl{PDMPCIBUSREG,pfnRegister}
  */
-static DECLCALLBACK(int) pcibridgeRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)
+static DECLCALLBACK(int) pcibridgeR3RegisterDevice(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev)
 {
     PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
 
@@ -2529,14 +2449,14 @@ static DECLCALLBACK(int) pcibridgeRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDe
     /*
      * Register the device.
      */
-    return pciRegisterInternal(pBus, iDev, pPciDev, pszName);
+    return pciR3RegisterDeviceInternal(pBus, iDev, pPciDev, pszName);
 }
 
 
 /**
- * @copydoc FNPDMDEVRESET
+ * @interface_method_impl{PDMDEVREG, pfnReset}
  */
-static DECLCALLBACK(void) pcibridgeReset(PPDMDEVINS pDevIns)
+static DECLCALLBACK(void) pcibridgeR3Reset(PPDMDEVINS pDevIns)
 {
     PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
 
@@ -2548,9 +2468,9 @@ static DECLCALLBACK(void) pcibridgeReset(PPDMDEVINS pDevIns)
 
 
 /**
- * @copydoc FNPDMDEVRELOCATE
+ * @interface_method_impl{PDMDEVREG, pfnRelocate}
  */
-static DECLCALLBACK(void) pcibridgeRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
+static DECLCALLBACK(void) pcibridgeR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
 {
     PPCIBUS pBus = PDMINS_2_DATA(pDevIns, PPCIBUS);
     pBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
@@ -2567,7 +2487,7 @@ static DECLCALLBACK(void) pcibridgeRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDe
 /**
  * @interface_method_impl{PDMDEVREG,pfnConstruct}
  */
-static DECLCALLBACK(int)   pcibridgeConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
+static DECLCALLBACK(int)   pcibridgeR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
 {
     PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
 
@@ -2603,13 +2523,11 @@ static DECLCALLBACK(int)   pcibridgeConstruct(PPDMDEVINS pDevIns, int iInstance,
 
     PDMPCIBUSREG PciBusReg;
     PciBusReg.u32Version              = PDM_PCIBUSREG_VERSION;
-    PciBusReg.pfnRegisterR3           = pcibridgeRegister;
+    PciBusReg.pfnRegisterR3           = pcibridgeR3RegisterDevice;
     PciBusReg.pfnRegisterMsiR3        = NULL;
-    PciBusReg.pfnIORegionRegisterR3   = pciIORegionRegister;
-    PciBusReg.pfnSetConfigCallbacksR3 = pciSetConfigCallbacks;
+    PciBusReg.pfnIORegionRegisterR3   = pciR3CommonIORegionRegister;
+    PciBusReg.pfnSetConfigCallbacksR3 = pciR3CommonSetConfigCallbacks;
     PciBusReg.pfnSetIrqR3             = pcibridgeSetIrq;
-    PciBusReg.pfnSaveExecR3           = pciGenericSaveExec;
-    PciBusReg.pfnLoadExecR3           = pciGenericLoadExec;
     PciBusReg.pfnFakePCIBIOSR3        = NULL; /* Only needed for the first bus. */
     PciBusReg.pszSetIrqRC             = fGCEnabled ? "pcibridgeSetIrq" : NULL;
     PciBusReg.pszSetIrqR0             = fR0Enabled ? "pcibridgeSetIrq" : NULL;
@@ -2643,19 +2561,19 @@ static DECLCALLBACK(int)   pcibridgeConstruct(PPDMDEVINS pDevIns, int iInstance,
      * This device does not generate interrupts. Interrupt delivery from
      * devices attached to the bus is unaffected.
      */
-    PCIDevSetInterruptPin (&pBus->PciDev, 0x00);
+    PCIDevSetInterruptPin(&pBus->PciDev, 0x00);
 
     pBus->PciDev.pDevIns                    = pDevIns;
 
     /* Bridge-specific data */
     pciDevSetPci2PciBridge(&pBus->PciDev);
-    pBus->PciDev.Int.s.pfnBridgeConfigRead  = pcibridgeConfigRead;
-    pBus->PciDev.Int.s.pfnBridgeConfigWrite = pcibridgeConfigWrite;
+    pBus->PciDev.Int.s.pfnBridgeConfigRead  = pcibridgeR3ConfigRead;
+    pBus->PciDev.Int.s.pfnBridgeConfigWrite = pcibridgeR3ConfigWrite;
 
     /*
      * Register this PCI bridge. The called function will take care on which bus we will get registered.
      */
-    rc = PDMDevHlpPCIRegister (pDevIns, &pBus->PciDev);
+    rc = PDMDevHlpPCIRegister(pDevIns, &pBus->PciDev);
     if (RT_FAILURE(rc))
         return rc;
 
@@ -2710,17 +2628,17 @@ const PDMDEVREG g_DevicePCIBridge =
     /* cbInstance */
     sizeof(PCIBUS),
     /* pfnConstruct */
-    pcibridgeConstruct,
+    pcibridgeR3Construct,
     /* pfnDestruct */
     NULL,
     /* pfnRelocate */
-    pcibridgeRelocate,
-    /* pfnIOCtl */
+    pcibridgeR3Relocate,
+    /* pfnMemSetup */
     NULL,
     /* pfnPowerOn */
     NULL,
     /* pfnReset */
-    pcibridgeReset,
+    pcibridgeR3Reset,
     /* pfnSuspend */
     NULL,
     /* pfnResume */
diff --git a/src/VBox/Devices/Bus/DevPciIch9.cpp b/src/VBox/Devices/Bus/DevPciIch9.cpp
index a7512391..8fe22005 100644
--- a/src/VBox/Devices/Bus/DevPciIch9.cpp
+++ b/src/VBox/Devices/Bus/DevPciIch9.cpp
@@ -1,10 +1,13 @@
 /* $Id: DevPciIch9.cpp $ */
 /** @file
  * DevPCI - ICH9 southbridge PCI bus emulation device.
+ *
+ * @note    bird: I've cleaned up DevPCI.cpp to some extend, this file has not
+ *                be cleaned up and because of pending code merge.
  */
 
 /*
- * Copyright (C) 2010-2011 Oracle Corporation
+ * Copyright (C) 2010-2013 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
@@ -19,7 +22,7 @@
 *   Header Files                                                               *
 *******************************************************************************/
 #define LOG_GROUP LOG_GROUP_DEV_PCI
-/* Hack to get PCIDEVICEINT declare at the right point - include "PCIInternal.h". */
+/* Hack to get PCIDEVICEINT declared at the right point - include "PCIInternal.h". */
 #define PCI_INCLUDE_PRIVATE
 #define PCIBus ICH9PCIBus
 #include <VBox/pci.h>
@@ -33,7 +36,6 @@
 #endif
 
 #include "VBoxDD.h"
-
 #include "MsiCommon.h"
 
 
@@ -969,21 +971,6 @@ static DECLCALLBACK(void) ich9pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVI
     pPciDev->Int.s.pfnConfigWrite = pfnWrite;
 }
 
-/**
- * Saves a state of the PCI device.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         Pointer to PCI device.
- * @param   pSSM            The handle to save the state to.
- */
-static DECLCALLBACK(int) ich9pciGenericSaveExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
-{
-    NOREF(pDevIns);
-    Assert(!pciDevIsPassthrough(pPciDev));
-    return SSMR3PutMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
-}
-
 static int ich9pciR3CommonSaveExec(PICH9PCIBUS pBus, PSSMHANDLE pSSM)
 {
     /*
@@ -1152,54 +1139,54 @@ static void pciR3CommonRestoreConfig(PPCIDEVICE pDev, uint8_t const *pbSrcConfig
     } s_aFields[] =
     {
         /* off,cb,fW,fB, pszName */
-        { VBOX_PCI_VENDOR_ID, 2, 0, 3, "VENDOR_ID" },
-        { VBOX_PCI_DEVICE_ID, 2, 0, 3, "DEVICE_ID" },
-        { VBOX_PCI_STATUS, 2, 1, 3, "STATUS" },
-        { VBOX_PCI_REVISION_ID, 1, 0, 3, "REVISION_ID" },
-        { VBOX_PCI_CLASS_PROG, 1, 0, 3, "CLASS_PROG" },
-        { VBOX_PCI_CLASS_SUB, 1, 0, 3, "CLASS_SUB" },
-        { VBOX_PCI_CLASS_BASE, 1, 0, 3, "CLASS_BASE" },
-        { VBOX_PCI_CACHE_LINE_SIZE, 1, 1, 3, "CACHE_LINE_SIZE" },
-        { VBOX_PCI_LATENCY_TIMER, 1, 1, 3, "LATENCY_TIMER" },
-        { VBOX_PCI_HEADER_TYPE, 1, 0, 3, "HEADER_TYPE" },
-        { VBOX_PCI_BIST, 1, 1, 3, "BIST" },
-        { VBOX_PCI_BASE_ADDRESS_0, 4, 1, 3, "BASE_ADDRESS_0" },
-        { VBOX_PCI_BASE_ADDRESS_1, 4, 1, 3, "BASE_ADDRESS_1" },
-        { VBOX_PCI_BASE_ADDRESS_2, 4, 1, 1, "BASE_ADDRESS_2" },
-        { VBOX_PCI_PRIMARY_BUS, 1, 1, 2, "PRIMARY_BUS" },       // fWritable = ??
-        { VBOX_PCI_SECONDARY_BUS, 1, 1, 2, "SECONDARY_BUS" },     // fWritable = ??
-        { VBOX_PCI_SUBORDINATE_BUS, 1, 1, 2, "SUBORDINATE_BUS" },   // fWritable = ??
-        { VBOX_PCI_SEC_LATENCY_TIMER, 1, 1, 2, "SEC_LATENCY_TIMER" }, // fWritable = ??
-        { VBOX_PCI_BASE_ADDRESS_3, 4, 1, 1, "BASE_ADDRESS_3" },
-        { VBOX_PCI_IO_BASE, 1, 1, 2, "IO_BASE" },           // fWritable = ??
-        { VBOX_PCI_IO_LIMIT, 1, 1, 2, "IO_LIMIT" },          // fWritable = ??
-        { VBOX_PCI_SEC_STATUS, 2, 1, 2, "SEC_STATUS" },        // fWritable = ??
-        { VBOX_PCI_BASE_ADDRESS_4, 4, 1, 1, "BASE_ADDRESS_4" },
-        { VBOX_PCI_MEMORY_BASE, 2, 1, 2, "MEMORY_BASE" },       // fWritable = ??
-        { VBOX_PCI_MEMORY_LIMIT, 2, 1, 2, "MEMORY_LIMIT" },      // fWritable = ??
-        { VBOX_PCI_BASE_ADDRESS_5, 4, 1, 1, "BASE_ADDRESS_5" },
-        { VBOX_PCI_PREF_MEMORY_BASE, 2, 1, 2, "PREF_MEMORY_BASE" },  // fWritable = ??
-        { VBOX_PCI_PREF_MEMORY_LIMIT, 2, 1, 2, "PREF_MEMORY_LIMIT" }, // fWritable = ??
-        { VBOX_PCI_CARDBUS_CIS, 4, 1, 1, "CARDBUS_CIS" },       // fWritable = ??
-        { VBOX_PCI_PREF_BASE_UPPER32, 4, 1, 2, "PREF_BASE_UPPER32" }, // fWritable = ??
-        { VBOX_PCI_SUBSYSTEM_VENDOR_ID, 2, 0, 1, "SUBSYSTEM_VENDOR_ID" },// fWritable = !?
-        { VBOX_PCI_PREF_LIMIT_UPPER32, 4, 1, 2, "PREF_LIMIT_UPPER32" },// fWritable = ??
-        { VBOX_PCI_SUBSYSTEM_ID, 2, 0, 1, "SUBSYSTEM_ID" },      // fWritable = !?
-        { VBOX_PCI_ROM_ADDRESS, 4, 1, 1, "ROM_ADDRESS" },       // fWritable = ?!
-        { VBOX_PCI_IO_BASE_UPPER16, 2, 1, 2, "IO_BASE_UPPER16" },   // fWritable = ?!
-        { VBOX_PCI_IO_LIMIT_UPPER16, 2, 1, 2, "IO_LIMIT_UPPER16" },  // fWritable = ?!
-        { VBOX_PCI_CAPABILITY_LIST, 4, 0, 3, "CAPABILITY_LIST" },   // fWritable = !? cb=!?
-        { VBOX_PCI_RESERVED_38, 4, 1, 1, "RESERVED_38" },               // ???
-        { VBOX_PCI_ROM_ADDRESS_BR, 4, 1, 2, "ROM_ADDRESS_BR" },    // fWritable = !? cb=!? fBridge=!?
-        { VBOX_PCI_INTERRUPT_LINE, 1, 1, 3, "INTERRUPT_LINE" },    // fBridge=??
-        { VBOX_PCI_INTERRUPT_PIN, 1, 0, 3, "INTERRUPT_PIN" },     // fBridge=??
-        { VBOX_PCI_MIN_GNT, 1, 0, 1, "MIN_GNT" },
-        { VBOX_PCI_BRIDGE_CONTROL, 2, 1, 2, "BRIDGE_CONTROL" },    // fWritable = !?
-        { VBOX_PCI_MAX_LAT, 1, 0, 1, "MAX_LAT" },
+        { 0x00, 2, 0, 3, "VENDOR_ID" },
+        { 0x02, 2, 0, 3, "DEVICE_ID" },
+        { 0x06, 2, 1, 3, "STATUS" },
+        { 0x08, 1, 0, 3, "REVISION_ID" },
+        { 0x09, 1, 0, 3, "CLASS_PROG" },
+        { 0x0a, 1, 0, 3, "CLASS_SUB" },
+        { 0x0b, 1, 0, 3, "CLASS_BASE" },
+        { 0x0c, 1, 1, 3, "CACHE_LINE_SIZE" },
+        { 0x0d, 1, 1, 3, "LATENCY_TIMER" },
+        { 0x0e, 1, 0, 3, "HEADER_TYPE" },
+        { 0x0f, 1, 1, 3, "BIST" },
+        { 0x10, 4, 1, 3, "BASE_ADDRESS_0" },
+        { 0x14, 4, 1, 3, "BASE_ADDRESS_1" },
+        { 0x18, 4, 1, 1, "BASE_ADDRESS_2" },
+        { 0x18, 1, 1, 2, "PRIMARY_BUS" },       // fWritable = ??
+        { 0x19, 1, 1, 2, "SECONDARY_BUS" },     // fWritable = ??
+        { 0x1a, 1, 1, 2, "SUBORDINATE_BUS" },   // fWritable = ??
+        { 0x1b, 1, 1, 2, "SEC_LATENCY_TIMER" }, // fWritable = ??
+        { 0x1c, 4, 1, 1, "BASE_ADDRESS_3" },
+        { 0x1c, 1, 1, 2, "IO_BASE" },           // fWritable = ??
+        { 0x1d, 1, 1, 2, "IO_LIMIT" },          // fWritable = ??
+        { 0x1e, 2, 1, 2, "SEC_STATUS" },        // fWritable = ??
+        { 0x20, 4, 1, 1, "BASE_ADDRESS_4" },
+        { 0x20, 2, 1, 2, "MEMORY_BASE" },       // fWritable = ??
+        { 0x22, 2, 1, 2, "MEMORY_LIMIT" },      // fWritable = ??
+        { 0x24, 4, 1, 1, "BASE_ADDRESS_5" },
+        { 0x24, 2, 1, 2, "PREF_MEMORY_BASE" },  // fWritable = ??
+        { 0x26, 2, 1, 2, "PREF_MEMORY_LIMIT" }, // fWritable = ??
+        { 0x28, 4, 1, 1, "CARDBUS_CIS" },       // fWritable = ??
+        { 0x28, 4, 1, 2, "PREF_BASE_UPPER32" }, // fWritable = ??
+        { 0x2c, 2, 0, 1, "SUBSYSTEM_VENDOR_ID" },// fWritable = !?
+        { 0x2c, 4, 1, 2, "PREF_LIMIT_UPPER32" },// fWritable = ??
+        { 0x2e, 2, 0, 1, "SUBSYSTEM_ID" },      // fWritable = !?
+        { 0x30, 4, 1, 1, "ROM_ADDRESS" },       // fWritable = ?!
+        { 0x30, 2, 1, 2, "IO_BASE_UPPER16" },   // fWritable = ?!
+        { 0x32, 2, 1, 2, "IO_LIMIT_UPPER16" },  // fWritable = ?!
+        { 0x34, 4, 0, 3, "CAPABILITY_LIST" },   // fWritable = !? cb=!?
+        { 0x38, 4, 1, 1, "RESERVED_38" },       // ???
+        { 0x38, 4, 1, 2, "ROM_ADDRESS_BR" },    // fWritable = !? cb=!? fBridge=!?
+        { 0x3c, 1, 1, 3, "INTERRUPT_LINE" },    // fBridge=??
+        { 0x3d, 1, 0, 3, "INTERRUPT_PIN" },     // fBridge=??
+        { 0x3e, 1, 0, 1, "MIN_GNT" },
+        { 0x3e, 2, 1, 2, "BRIDGE_CONTROL" },    // fWritable = !?
+        { 0x3f, 1, 0, 1, "MAX_LAT" },
         /* The COMMAND register must come last as it requires the *ADDRESS*
            registers to be restored before we pretent to change it from 0 to
            whatever value the guest assigned it. */
-        { VBOX_PCI_COMMAND, 2, 1, 3, "COMMAND" },
+        { 0x04, 2, 1, 3, "COMMAND" },
     };
 
 #ifdef RT_STRICT
@@ -1444,21 +1431,6 @@ static DECLCALLBACK(int) ich9pciR3CommonLoadExec(PICH9PCIBUS pBus, PSSMHANDLE pS
     return rc;
 }
 
-/**
- * Loads a saved PCI device state.
- *
- * @returns VBox status code.
- * @param   pDevIns         Device instance of the PCI Bus.
- * @param   pPciDev         Pointer to PCI device.
- * @param   pSSM            The handle to the saved state.
- */
-static DECLCALLBACK(int) ich9pciGenericLoadExec(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSM)
-{
-    NOREF(pDevIns);
-    Assert(!pciDevIsPassthrough(pPciDev));
-    return SSMR3GetMem(pSSM, &pPciDev->config[0], sizeof(pPciDev->config));
-}
-
 static DECLCALLBACK(int) ich9pciR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
 {
     PICH9PCIGLOBALS pThis = PDMINS_2_DATA(pDevIns, PICH9PCIGLOBALS);
@@ -1701,7 +1673,9 @@ static void ich9pciBiosInitDevice(PICH9PCIGLOBALS pGlobals, uint8_t uBus, uint8_
                     cbRegSize64 = (~cbRegSize64) + 1;
 
                     /* No 64-bit PIO regions possible. */
-                    Assert((u8ResourceType & PCI_COMMAND_IOACCESS) == 0);
+#ifndef DEBUG_bird /* EFI triggers this for DevAHCI. */
+                    AssertMsg((u8ResourceType & PCI_COMMAND_IOACCESS) == 0, ("type=%#x rgn=%d\n", u8ResourceType, iRegion));
+#endif
                 }
                 else
                 {
@@ -1726,7 +1700,9 @@ static void ich9pciBiosInitDevice(PICH9PCIGLOBALS pGlobals, uint8_t uBus, uint8_
 
                     cbRegSize64 = cbRegSize32;
                 }
+#ifndef DEBUG_bird /* EFI triggers this for DevAHCI. */
                 Assert(cbRegSize64 == (uint32_t)cbRegSize64);
+#endif
                 Log2(("%s: Size of region %u for device %d on bus %d is %lld\n", __FUNCTION__, iRegion, uDevFn, uBus, cbRegSize64));
 
                 if (cbRegSize64)
@@ -2462,8 +2438,6 @@ static DECLCALLBACK(int) ich9pciConstruct(PPDMDEVINS pDevIns,
     PciBusReg.pfnIORegionRegisterR3   = ich9pciIORegionRegister;
     PciBusReg.pfnSetConfigCallbacksR3 = ich9pciSetConfigCallbacks;
     PciBusReg.pfnSetIrqR3             = ich9pciSetIrq;
-    PciBusReg.pfnSaveExecR3           = ich9pciGenericSaveExec;
-    PciBusReg.pfnLoadExecR3           = ich9pciGenericLoadExec;
     PciBusReg.pfnFakePCIBIOSR3        = ich9pciFakePCIBIOS;
     PciBusReg.pszSetIrqRC             = fGCEnabled ? "ich9pciSetIrq" : NULL;
     PciBusReg.pszSetIrqR0             = fR0Enabled ? "ich9pciSetIrq" : NULL;
@@ -2705,8 +2679,6 @@ static DECLCALLBACK(int)   ich9pcibridgeConstruct(PPDMDEVINS pDevIns,
     PciBusReg.pfnIORegionRegisterR3   = ich9pciIORegionRegister;
     PciBusReg.pfnSetConfigCallbacksR3 = ich9pciSetConfigCallbacks;
     PciBusReg.pfnSetIrqR3             = ich9pcibridgeSetIrq;
-    PciBusReg.pfnSaveExecR3           = ich9pciGenericSaveExec;
-    PciBusReg.pfnLoadExecR3           = ich9pciGenericLoadExec;
     PciBusReg.pfnFakePCIBIOSR3        = NULL; /* Only needed for the first bus. */
     PciBusReg.pszSetIrqRC             = fGCEnabled ? "ich9pcibridgeSetIrq" : NULL;
     PciBusReg.pszSetIrqR0             = fR0Enabled ? "ich9pcibridgeSetIrq" : NULL;
@@ -2850,7 +2822,7 @@ const PDMDEVREG g_DevicePciIch9 =
     NULL,
     /* pfnRelocate */
     ich9pciRelocate,
-    /* pfnIOCtl */
+    /* pfnMemSetup */
     NULL,
     /* pfnPowerOn */
     NULL,
@@ -2906,7 +2878,7 @@ const PDMDEVREG g_DevicePciIch9Bridge =
     NULL,
     /* pfnRelocate */
     ich9pcibridgeRelocate,
-    /* pfnIOCtl */
+    /* pfnMemSetup */
     NULL,
     /* pfnPowerOn */
     NULL,
diff --git a/src/VBox/Devices/Bus/MsiCommon.cpp b/src/VBox/Devices/Bus/MsiCommon.cpp
index db2727c0..6c8ab099 100644
--- a/src/VBox/Devices/Bus/MsiCommon.cpp
+++ b/src/VBox/Devices/Bus/MsiCommon.cpp
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2010 Oracle Corporation
+ * Copyright (C) 2010-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Devices/Bus/MsiCommon.h b/src/VBox/Devices/Bus/MsiCommon.h
index 4567b0e9..73ddda46 100644
--- a/src/VBox/Devices/Bus/MsiCommon.h
+++ b/src/VBox/Devices/Bus/MsiCommon.h
@@ -3,7 +3,7 @@
  * Header for MSI/MSI-X support routines.
  */
 /*
- * Copyright (C) 2010 Oracle Corporation
+ * Copyright (C) 2010-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Devices/Bus/MsixCommon.cpp b/src/VBox/Devices/Bus/MsixCommon.cpp
index 06b08589..abe169b5 100644
--- a/src/VBox/Devices/Bus/MsixCommon.cpp
+++ b/src/VBox/Devices/Bus/MsixCommon.cpp
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2010 Oracle Corporation
+ * Copyright (C) 2010-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Devices/Bus/PCIInternal.h b/src/VBox/Devices/Bus/PCIInternal.h
index 0e0bc08f..edb32c90 100644
--- a/src/VBox/Devices/Bus/PCIInternal.h
+++ b/src/VBox/Devices/Bus/PCIInternal.h
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2006-2007 Oracle Corporation
+ * Copyright (C) 2006-2011 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;
diff --git a/src/VBox/Devices/Bus/SrvPciRawR0.cpp b/src/VBox/Devices/Bus/SrvPciRawR0.cpp
index 22b0479c..678a2ba7 100644
--- a/src/VBox/Devices/Bus/SrvPciRawR0.cpp
+++ b/src/VBox/Devices/Bus/SrvPciRawR0.cpp
@@ -4,7 +4,7 @@
  */
 
 /*
- * Copyright (C) 2011 Oracle Corporation
+ * Copyright (C) 2011-2012 Oracle Corporation
  *
  * This file is part of VirtualBox Open Source Edition (OSE), as
  * available from http://www.virtualbox.org. This file is free software;